Re: [RFA 5/8] New port: TI C6x: gdb port

[Pedro Alves <pedro@codesourcery.com>]

On Thursday 04 August 2011 16:11:35, Joseph S. Myers wrote:
> On Thu, 4 Aug 2011, Pedro Alves wrote:
> 
> > Seems like there are a lot of non-core registers here.  Now that
> > the gdbserver patch has been updated to send in standard tic6x xml
> > register description features, all registers the target includes in the
> > description that are not part of the defined features should not need
> > to be hardcoded in gdb, since the xml description itself will describe
> > their sizes and names.  See arm-tdep.c:arm_register_name for example.
> > More comments on this further down.
> 
> Won't GDB need a list of how the register names correspond to DWARF 
> register numbers (which are allocated for all these registers) somewhere?

AFAICS, gdbserver only exposes A0-A15, CSR, PC, A16-A31
B16-B31, TSR, ILC, RILC, so I assumed all other registers would be
system dependent non general purpose control registers, but it's
probably then that they are only not "user space" registers, and will
be acessible by bare metal probes/stubs?  Linux programs won't access
those, right?  I now browsed the ABI's dwarf section and I got that
impression.

The default is to assume 1-1 mapping between gdb numbers and dwarf
numbers, so it's easier to ensure the numbers are the same.
I guess that clears up my comment to the register numbers.
As for names, types and sizes, if the target doesn't include those
registers in the description, then it's as if they don't exist.  A
description that reports those extra registers should include those
properties (name, bitsize, type, regnum) per register, so gdb would still
get them from the description.  I can't tell if it would make sense
to add a new feature or features for those extra registers though.

-- 
Pedro Alves