From: Jan Kratochvil <jan.kratochvil@redhat.com>
To: Ulrich Weigand <uweigand@de.ibm.com>
Cc: drow@false.org, Tom Tromey <tromey@redhat.com>,
Mark Kettenis <mark.kettenis@xs4all.nl>,
gdb-patches@sourceware.org
Subject: [patch] /* */ for target_thread_architecture [Re: [patch] Fix i386 memory-by-register access on amd64]
Date: Wed, 08 Jul 2009 13:20:00 -0000 [thread overview]
Message-ID: <20090708132023.GA19891@host0.dyn.jankratochvil.net> (raw)
In-Reply-To: <200907071624.n67GO6bj015890@d12av02.megacenter.de.ibm.com>
On Tue, 07 Jul 2009 18:24:06 +0200, Ulrich Weigand wrote:
> Jan Kratochvil wrote:
> > @@ -452,8 +452,20 @@ inf_ptrace_xfer_partial (struct target_ops *ops, enum target_object object,
> > const gdb_byte *writebuf,
> > ULONGEST offset, LONGEST len)
> > {
> > + struct gdbarch *gdbarch = target_thread_architecture (inferior_ptid);
> > + int addr_bit = gdbarch_addr_bit (gdbarch);
>
> target_thread_architecture is wrong for this purpose; it is the user-visible
> architecture to be used for this thread. The architecture to be used for
> target (e.g. ptrace) operations is target_gdbarch.
>
> For example, on an SPU thread on the Cell/B.E. target_thread_architecture might
> be SPU, while target_gdbarch is PPC32 or PPC64. ptrace operations need to operate
> according to the latter.
While thanks for the explanation I believe it should be in the sources. It is
mostly your text from:
http://sourceware.org/ml/gdb-patches/2008-09/msg00133.html
OK to check-in?
Thanks,
Jan
2009-07-08 Ulrich Weigand <uweigand@de.ibm.com>
Jan Kratochvil <jan.kratochvil@redhat.com>
* target.h (struct target_ops <to_thread_architecture>): Describe it.
(target_thread_architecture): Refer to to_thread_architecture.
--- a/gdb/target.h
+++ b/gdb/target.h
@@ -543,7 +543,16 @@ struct target_ops
simultaneously? */
int (*to_supports_multi_process) (void);
- /* Determine current architecture of thread PTID. */
+ /* Determine current architecture of thread PTID.
+
+ The target is supposed to determine the architecture of the code where
+ the target is currently stopped at (on Cell, if a target is in spu_run,
+ to_thread_architecture would return SPU, otherwise PPC32 or PPC64).
+ This is architecture used to perform decr_pc_after_break adjustment,
+ and also determines the frame architecture of the innermost frame.
+ ptrace operations need to operate according to target_gdbarch.
+
+ The default implementation always returns target_gdbarch. */
struct gdbarch *(*to_thread_architecture) (struct target_ops *, ptid_t);
int to_magic;
@@ -1043,7 +1052,7 @@ extern char *normal_pid_to_str (ptid_t ptid);
#define target_pid_to_exec_file(pid) \
(current_target.to_pid_to_exec_file) (pid)
-/* Determine current architecture of thread PTID. */
+/* See the to_thread_architecture description in struct target_ops. */
#define target_thread_architecture(ptid) \
(current_target.to_thread_architecture (¤t_target, ptid))
next prev parent reply other threads:[~2009-07-08 13:20 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2009-04-29 10:27 [patch] Fix i386 memory-by-register access on amd64 Jan Kratochvil
2009-04-29 19:05 ` Mark Kettenis
2009-04-29 20:29 ` Jan Kratochvil
2009-04-29 20:45 ` Jan Kratochvil
2009-06-25 16:33 ` Tom Tromey
2009-07-06 8:19 ` Jan Kratochvil
2009-07-07 16:24 ` Ulrich Weigand
2009-07-07 16:54 ` Daniel Jacobowitz
2009-07-07 18:00 ` Mark Kettenis
2009-07-07 18:22 ` Jan Kratochvil
2009-07-07 18:43 ` Mark Kettenis
2009-07-08 13:20 ` Jan Kratochvil [this message]
2009-07-09 12:51 ` [patch] /* */ for target_thread_architecture [Re: [patch] Fix i386 memory-by-register access on amd64] Ulrich Weigand
2009-07-09 16:36 ` Jan Kratochvil
2009-07-08 14:42 ` [patch] Fix i386 memory-by-register access on amd64 Jan Kratochvil
2009-07-13 18:10 ` Ulrich Weigand
2009-07-13 19:42 ` Mark Kettenis
2009-07-13 20:32 ` Jan Kratochvil
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