* [PATCH,sim] properly handle sync instruction variants
@ 2009-01-12 18:10 Nathan Froyd
2009-01-12 19:11 ` Daniel Jacobowitz
0 siblings, 1 reply; 2+ messages in thread
From: Nathan Froyd @ 2009-01-12 18:10 UTC (permalink / raw)
To: gdb-patches
Recent Power ISAs have included the ability to control the type of
memory accesses ordered by the `sync' instruction by means of a two-bit
field. The patch below modifies the ppc simulator's instruction
description to take note of this two-bit field.
Tested on powerpc-none-eabi, where it fixes ~140 g++ testsuite failures
and a handful of gcc failures. OK to commit?
-Nathan
cvs diff: Diffing .
Index: ChangeLog
===================================================================
RCS file: /cvs/src/src/sim/ppc/ChangeLog,v
retrieving revision 1.87
diff -u -u -r1.87 ChangeLog
--- ChangeLog 15 Dec 2008 19:48:06 -0000 1.87
+++ ChangeLog 12 Jan 2009 18:04:27 -0000
@@ -1,3 +1,7 @@
+2009-01-12 Nathan Froyd <froydnj@codesourcery.com>
+
+ * ppc-instructions (sync): Add L field.
+
2008-12-15 Joel Sherrill <joel.sherrill@oarcorp.com>
* ppc-instructions, ppc-spr-table: Add ability
Index: ppc-instructions
===================================================================
RCS file: /cvs/src/src/sim/ppc/ppc-instructions,v
retrieving revision 1.10
diff -u -u -r1.10 ppc-instructions
--- ppc-instructions 15 Dec 2008 19:48:06 -0000 1.10
+++ ppc-instructions 12 Jan 2009 18:04:27 -0000
@@ -2494,7 +2494,7 @@
}
PPC_INSN_INT(0, (RA_BITMASK & ~1) | RB_BITMASK | RS_BITMASK, 1/*Rc*/);
-0.31,6./,11./,16./,21.598,31./:X::sync:Synchronize
+0.31,6./,9.L,11./,16./,21.598,31./:X::sync:Synchronize
*601: PPC_UNIT_IU, PPC_UNIT_IU, 1, 1, 0
*603: PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
*603e:PPC_UNIT_SRU, PPC_UNIT_SRU, 1, 1, 0
^ permalink raw reply [flat|nested] 2+ messages in thread
* Re: [PATCH,sim] properly handle sync instruction variants
2009-01-12 18:10 [PATCH,sim] properly handle sync instruction variants Nathan Froyd
@ 2009-01-12 19:11 ` Daniel Jacobowitz
0 siblings, 0 replies; 2+ messages in thread
From: Daniel Jacobowitz @ 2009-01-12 19:11 UTC (permalink / raw)
To: gdb-patches
On Mon, Jan 12, 2009 at 10:09:54AM -0800, Nathan Froyd wrote:
> Recent Power ISAs have included the ability to control the type of
> memory accesses ordered by the `sync' instruction by means of a two-bit
> field. The patch below modifies the ppc simulator's instruction
> description to take note of this two-bit field.
>
> Tested on powerpc-none-eabi, where it fixes ~140 g++ testsuite failures
> and a handful of gcc failures. OK to commit?
OK.
--
Daniel Jacobowitz
CodeSourcery
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