[RFA/erc32 sim] build errors

[Jerome Guitton <guitton@adacore.com>]

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Mainly removing the uneeded duplicated symbols and fixing some compilation
errors generated by GCC 3.4.

OK to apply?

2005-02-21  Jerome Guitton  <guitton@gnat.com>

	* sim/erc32/float.c (set_fsr): Do not use deprecated multi-line
	strings.
	(clear_accex): Ditto.
	* sim/erc32/interf.c: Remove the redeclaration of fprintf.
	* sim/erc32/sis.c: Ditto.
	* sim/erc32/exec.c: Add missing semicolon.
	* sim/erc32/func.c: Remove definitions of generic_print_address,
	generic_symbol_at_address, buffer_read_memory and perror_memory, as
	they are already defined in opcodes/dis-buf.c.

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Index: exec.c
===================================================================
RCS file: /cvs/src/src/sim/erc32/exec.c,v
retrieving revision 1.1.1.1
diff -u -p -r1.1.1.1 exec.c
--- exec.c	16 Apr 1999 01:35:00 -0000	1.1.1.1
+++ exec.c	21 Feb 2005 18:00:34 -0000
@@ -1713,6 +1713,7 @@ fpexec(op3, rd, rs1, rs2, sregs)
     	    sregs->fdp[rs2 | 1] = sregs->fs[rs2 & ~1];
     	    sregs->fdp[rs2 & ~1] = sregs->fs[rs2 | 1];
     default:
+      ;
     }
 #endif
 
@@ -1885,6 +1886,7 @@ fpexec(op3, rd, rs1, rs2, sregs)
 	sregs->fs[rd & ~1] = sregs->fdp[rd | 1];
 	sregs->fs[rd | 1] = sregs->fdp[rd & ~1];
     default:
+      ;
     }
 #endif
     if (sregs->fpstate == FP_EXC_PE) {
Index: float.c
===================================================================
RCS file: /cvs/src/src/sim/erc32/float.c,v
retrieving revision 1.1.1.1
diff -u -p -r1.1.1.1 float.c
--- float.c	16 Apr 1999 01:35:00 -0000	1.1.1.1
+++ float.c	21 Feb 2005 18:00:34 -0000
@@ -67,11 +67,11 @@ clear_accex()
 #ifdef sparc
     set_fsr((_get_fsr_raw() & ~0x3e0));
 #elif i386
-    asm("
-.text
-	fnclex
-
-    ");
+    asm("\n"
+".text\n"
+"	fnclex\n"
+"\n"
+"    ");
 #else
 #warning no fpu trap support for this target
 #endif
@@ -108,65 +108,65 @@ uint32 fsr;
 
 #ifdef sparc
 
-    asm("
-
-.text
-        .align 4
-        .global __set_fsr_raw,_set_fsr_raw
-__set_fsr_raw:
-_set_fsr_raw:
-        save %sp,-104,%sp
-        st %i0,[%fp+68]
-        ld [%fp+68], %fsr
-        mov 0,%i0
-        ret
-        restore
- 
-        .align 4
-        .global __get_fsr_raw
-        .global _get_fsr_raw
-__get_fsr_raw:
-_get_fsr_raw:
-        save %sp,-104,%sp
-        st %fsr,[%fp+68]
-        ld [%fp+68], %i0
-        ret
-        restore
- 
-    ");
+    asm("\n"
+"\n"
+".text\n"
+"        .align 4\n"
+"        .global __set_fsr_raw,_set_fsr_raw\n"
+"__set_fsr_raw:\n"
+"_set_fsr_raw:\n"
+"        save %sp,-104,%sp\n"
+"        st %i0,[%fp+68]\n"
+"        ld [%fp+68], %fsr\n"
+"        mov 0,%i0\n"
+"        ret\n"
+"        restore\n"
+"\n"
+"        .align 4\n"
+"        .global __get_fsr_raw\n"
+"        .global _get_fsr_raw\n"
+"__get_fsr_raw:\n"
+"_get_fsr_raw:\n"
+"        save %sp,-104,%sp\n"
+"        st %fsr,[%fp+68]\n"
+"        ld [%fp+68], %i0\n"
+"        ret\n"
+"        restore\n"
+"\n"
+"    ");
 
 #elif i386
 
-    asm("
-
-.text
-        .align 8
-.globl _get_sw,__get_sw
-__get_sw:
-_get_sw:
-        pushl %ebp
-        movl %esp,%ebp
-        movl $0,%eax
-        fnstsw %ax
-        movl %ebp,%esp
-        popl %ebp
-        ret
-
-        .align 8
-.globl _get_cw,__get_cw
-__get_cw:
-_get_cw:
-        pushl %ebp
-        movl %esp,%ebp
-        subw $2,%esp
-        fnstcw -2(%ebp)
-        movw -2(%ebp),%eax
-        movl %ebp,%esp
-        popl %ebp
-        ret
-
-
-    ");
+    asm("\n"
+"\n"
+".text\n"
+"        .align 8\n"
+".globl _get_sw,__get_sw\n"
+"__get_sw:\n"
+"_get_sw:\n"
+"        pushl %ebp\n"
+"        movl %esp,%ebp\n"
+"        movl $0,%eax\n"
+"        fnstsw %ax\n"
+"        movl %ebp,%esp\n"
+"        popl %ebp\n"
+"        ret\n"
+"\n"
+"        .align 8\n"
+".globl _get_cw,__get_cw\n"
+"__get_cw:\n"
+"_get_cw:\n"
+"        pushl %ebp\n"
+"        movl %esp,%ebp\n"
+"        subw $2,%esp\n"
+"        fnstcw -2(%ebp)\n"
+"        movw -2(%ebp),%eax\n"
+"        movl %ebp,%esp\n"
+"        popl %ebp\n"
+"        ret\n"
+"\n"
+"\n"
+"    ");
 
 
 #else
Index: func.c
===================================================================
RCS file: /cvs/src/src/sim/erc32/func.c,v
retrieving revision 1.2
diff -u -p -r1.2 func.c
--- func.c	3 Mar 2000 15:00:58 -0000	1.2
+++ func.c	21 Feb 2005 18:00:34 -0000
@@ -827,49 +827,6 @@ dis_mem(addr, len, info)
     }
 }
 
-int
-buffer_read_memory(addr, buffer, size, info)
-    bfd_vma         addr;
-    bfd_byte       *buffer;
-    uint32          size;
-    struct disassemble_info *info;
-{
-    if (size == sis_memory_read(addr, buffer, size))
-	return (0);
-    else
-	return (1);
-}
-
-void
-perror_memory(status, addr, info)
-    int32           status;
-    bfd_vma         addr;
-    struct disassemble_info *info;
-{
-
-    printf("Could not read address 0x%08x\n", (unsigned int) addr);
-}
-
-void
-generic_print_address(addr, info)
-    bfd_vma         addr;
-    struct disassemble_info *info;
-{
-
-    printf("0x%x", (unsigned int) addr);
-}
-
-/* Just return the given address.  */
-
-int
-generic_symbol_at_address (addr, info)
-     bfd_vma addr;
-     struct disassemble_info * info;
-{
-  return 1;
-}
-
-
 /* Add event to event queue */
 
 void
Index: interf.c
===================================================================
RCS file: /cvs/src/src/sim/erc32/interf.c,v
retrieving revision 1.4
diff -u -p -r1.4 interf.c
--- interf.c	11 Nov 2004 21:58:57 -0000	1.4
+++ interf.c	21 Feb 2005 18:00:34 -0000
@@ -34,10 +34,6 @@
 
 #include "gdb/remote-sim.h"
 
-#ifndef fprintf
-extern          fprintf();
-#endif
-
 #define PSR_CWP 0x7
 
 #define	VAL(x)	strtol(x,(char **)NULL,0)
Index: sis.c
===================================================================
RCS file: /cvs/src/src/sim/erc32/sis.c,v
retrieving revision 1.1.1.1
diff -u -p -r1.1.1.1 sis.c
--- sis.c	16 Apr 1999 01:35:00 -0000	1.1.1.1
+++ sis.c	21 Feb 2005 18:00:34 -0000
@@ -33,10 +33,6 @@
 #include <dis-asm.h>
 #include "sim-config.h"
 
-#ifndef fprintf
-extern          fprintf();
-#endif
-
 #define	VAL(x)	strtol(x,(char **)NULL,0)
 
 /* Structures and functions from readline library */