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From: Fred Fish <fnf@public.ninemoons.com>
To: gdb-patches@sources.redhat.com
Cc: fnf@ninemoons.com
Subject: [PATCH] Remove some hardwired assumptions about register sets
Date: Wed, 17 Dec 2003 06:14:00 -0000	[thread overview]
Message-ID: <200312170614.hBH6Ebtl003033@fred.ninemoons.com> (raw)

This patch removes some hard coded assumptions about the sizes of the
various processor specific register sets, and also allows them to be
of different sizes if necessary.

Comments?


2003-11-19  Fred Fish  <fnf@redhat.com>

	* mips-tdep.c (NUM_MIPS_PROCESSOR_REGS): Remove enum and replace
	with num_mips_processor_regs variable.
	(mips_generic_reg_names): Let defined strings determine size.
	(mips_tx39_reg_names): Ditto.
	(mips_irix_reg_names): Ditto.
	(mips_register_name): Test num_mips_processor_regs instead of
	NUM_MIPS_PROCESSOR_REGS.
	(mips_gdbarch_init): Remove num_regs and uses.
	Set num_mips_processor_regs when setting mips_processor_reg_names.

Index: mips-tdep.c
===================================================================
RCS file: /cvs/src/src/gdb/mips-tdep.c,v
retrieving revision 1.262
diff -c -r1.262 mips-tdep.c
*** mips-tdep.c	25 Nov 2003 22:15:24 -0000	1.262
--- mips-tdep.c	17 Dec 2003 05:44:04 -0000
***************
*** 416,426 ****
     mips_register_name().  Processor specific registers 32 and above
     are listed in the followign tables.  */
  
! enum { NUM_MIPS_PROCESSOR_REGS = (90 - 32) };
  
  /* Generic MIPS.  */
  
! static const char *mips_generic_reg_names[NUM_MIPS_PROCESSOR_REGS] = {
    "sr",	"lo",	"hi",	"bad",	"cause","pc",
    "f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7",
    "f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15",
--- 416,426 ----
     mips_register_name().  Processor specific registers 32 and above
     are listed in the followign tables.  */
  
! static int num_mips_processor_regs;
  
  /* Generic MIPS.  */
  
! static const char *mips_generic_reg_names[] = {
    "sr",	"lo",	"hi",	"bad",	"cause","pc",
    "f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7",
    "f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15",
***************
*** 428,434 ****
    "f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",
    "fsr",  "fir",  ""/*"fp"*/,	"",
    "",	"",	"",	"",	"",	"",	"",	"",
!   "",	"",	"",	"",	"",	"",	"",	"",
  };
  
  /* Names of IDT R3041 registers.  */
--- 428,434 ----
    "f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",
    "fsr",  "fir",  ""/*"fp"*/,	"",
    "",	"",	"",	"",	"",	"",	"",	"",
!   "",	"",	"",	"",	"",	"",	"",	""
  };
  
  /* Names of IDT R3041 registers.  */
***************
*** 441,452 ****
    "f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",
    "fsr",  "fir",  "",/*"fp"*/	"",
    "",	"",	"bus",	"ccfg",	"",	"",	"",	"",
!   "",	"",	"port",	"cmp",	"",	"",	"epc",	"prid",
  };
  
  /* Names of tx39 registers.  */
  
! static const char *mips_tx39_reg_names[NUM_MIPS_PROCESSOR_REGS] = {
    "sr",	"lo",	"hi",	"bad",	"cause","pc",
    "",   "",   	"",   	"",   	"",   	"",   	"",   	"",
    "",   "",   	"",  	"",  	"",  	"",  	"",  	"",
--- 441,452 ----
    "f24",  "f25",  "f26",  "f27",  "f28",  "f29",  "f30",  "f31",
    "fsr",  "fir",  "",/*"fp"*/	"",
    "",	"",	"bus",	"ccfg",	"",	"",	"",	"",
!   "",	"",	"port",	"cmp",	"",	"",	"epc",	"prid"
  };
  
  /* Names of tx39 registers.  */
  
! static const char *mips_tx39_reg_names[] = {
    "sr",	"lo",	"hi",	"bad",	"cause","pc",
    "",   "",   	"",   	"",   	"",   	"",   	"",   	"",
    "",   "",   	"",  	"",  	"",  	"",  	"",  	"",
***************
*** 458,464 ****
  };
  
  /* Names of IRIX registers.  */
! static const char *mips_irix_reg_names[NUM_MIPS_PROCESSOR_REGS] = {
    "f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7",
    "f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15",
    "f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",
--- 458,464 ----
  };
  
  /* Names of IRIX registers.  */
! static const char *mips_irix_reg_names[] = {
    "f0",   "f1",   "f2",   "f3",   "f4",   "f5",   "f6",   "f7",
    "f8",   "f9",   "f10",  "f11",  "f12",  "f13",  "f14",  "f15",
    "f16",  "f17",  "f18",  "f19",  "f20",  "f21",  "f22",  "f23",
***************
*** 508,514 ****
      }
    else if (32 <= rawnum && rawnum < NUM_REGS)
      {
!       gdb_assert (rawnum - 32 < NUM_MIPS_PROCESSOR_REGS);
        return tdep->mips_processor_reg_names[rawnum - 32];
      }
    else
--- 508,514 ----
      }
    else if (32 <= rawnum && rawnum < NUM_REGS)
      {
!       gdb_assert (rawnum - 32 < num_mips_processor_regs);
        return tdep->mips_processor_reg_names[rawnum - 32];
      }
    else
***************
*** 5643,5649 ****
    struct gdbarch_tdep *tdep;
    int elf_flags;
    enum mips_abi mips_abi, found_abi, wanted_abi;
-   int num_regs;
  
    elf_flags = 0;
  
--- 5643,5648 ----
***************
*** 5792,5798 ****
  	regnum->lo = 68;
  	regnum->fp_control_status = 69;
  	regnum->fp_implementation_revision = 70;
- 	num_regs = 71;
        }
      else
        {
--- 5791,5796 ----
***************
*** 5804,5817 ****
  	regnum->fp0 = MIPS_EMBED_FP0_REGNUM;
  	regnum->fp_control_status = 70;
  	regnum->fp_implementation_revision = 71;
- 	num_regs = 90;
        }
      /* FIXME: cagney/2003-11-15: For MIPS, hasn't PC_REGNUM been
         replaced by read_pc?  */
      set_gdbarch_pc_regnum (gdbarch, regnum->pc);
      set_gdbarch_fp0_regnum (gdbarch, regnum->fp0);
-     set_gdbarch_num_regs (gdbarch, num_regs);
-     set_gdbarch_num_pseudo_regs (gdbarch, num_regs);
    }
  
    switch (mips_abi)
--- 5802,5812 ----
***************
*** 5965,5975 ****
    /* MIPS version of register names.  */
    set_gdbarch_register_name (gdbarch, mips_register_name);
    if (info.osabi == GDB_OSABI_IRIX)
!     tdep->mips_processor_reg_names = mips_irix_reg_names;
    else if (info.bfd_arch_info != NULL && info.bfd_arch_info->mach == bfd_mach_mips3900)
!     tdep->mips_processor_reg_names = mips_tx39_reg_names;
    else
!     tdep->mips_processor_reg_names = mips_generic_reg_names;
    set_gdbarch_read_pc (gdbarch, mips_read_pc);
    set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
    set_gdbarch_deprecated_target_read_fp (gdbarch, mips_read_sp); /* Draft FRAME base.  */
--- 5960,5981 ----
    /* MIPS version of register names.  */
    set_gdbarch_register_name (gdbarch, mips_register_name);
    if (info.osabi == GDB_OSABI_IRIX)
!     {
!       tdep->mips_processor_reg_names = mips_irix_reg_names;
!       num_mips_processor_regs = sizeof (mips_irix_reg_names) / sizeof (char *);
!     }
    else if (info.bfd_arch_info != NULL && info.bfd_arch_info->mach == bfd_mach_mips3900)
!     {
!       tdep->mips_processor_reg_names = mips_tx39_reg_names;
!       num_mips_processor_regs = sizeof (mips_tx39_reg_names) / sizeof (char *);
!     }
    else
!     {
!       tdep->mips_processor_reg_names = mips_generic_reg_names;
!       num_mips_processor_regs = sizeof (mips_generic_reg_names) / sizeof (char *);
!     }
!   set_gdbarch_num_regs (gdbarch, 32 + num_mips_processor_regs);
!   set_gdbarch_num_pseudo_regs (gdbarch, 32 + num_mips_processor_regs);
    set_gdbarch_read_pc (gdbarch, mips_read_pc);
    set_gdbarch_write_pc (gdbarch, generic_target_write_pc);
    set_gdbarch_deprecated_target_read_fp (gdbarch, mips_read_sp); /* Draft FRAME base.  */


             reply	other threads:[~2003-12-17  6:14 UTC|newest]

Thread overview: 9+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2003-12-17  6:14 Fred Fish [this message]
2003-12-17  6:22 ` Fred Fish
2003-12-23  1:51 ` Fred Fish
2003-12-23  2:03   ` Daniel Jacobowitz
2004-01-02 19:28     ` Andrew Cagney
2004-01-02 19:31       ` Daniel Jacobowitz
2004-01-02 23:12       ` Fred Fish
2004-01-05 15:50         ` Andrew Cagney
2003-12-23 11:30   ` Mark Kettenis

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