From: Ben Elliston <bje@redhat.com>
To: cagney@redhat.com, cgd@broadcom.com
Cc: gdb-patches@sources.redhat.com, bje@redhat.com
Subject: [MIPS sim patch] sim_monitor cleanup
Date: Sun, 18 Feb 2001 19:27:00 -0000 [thread overview]
Message-ID: <14992.37492.971949.281244@scooby.cygnus.com> (raw)
The following patch gives `sim_monitor' a return type of `int' and
returns meaningful result codes that the caller can use to decide on
appropriate error handling.
Okay to commit?
2001-02-19 Ben Elliston <bje@redhat.com>
* sim-main.h (sim_monitor): Return an int.
* interp.c (sim_monitor): Add return values.
(signal_exception): Handle error conditions from sim_monitor.
Index: interp.c
===================================================================
RCS file: /cvs/cvsfiles/devo/sim/mips/interp.c,v
retrieving revision 1.196.10.7
diff -u -c -r1.196.10.7 interp.c
*** interp.c 2001/02/16 02:01:42 1.196.10.7
--- interp.c 2001/02/19 03:08:39
***************
*** 1252,1258 ****
/* Simple monitor interface (currently setup for the IDT and PMON monitors) */
! void
sim_monitor (SIM_DESC sd,
sim_cpu *cpu,
address_word cia,
--- 1252,1258 ----
/* Simple monitor interface (currently setup for the IDT and PMON monitors) */
! int
sim_monitor (SIM_DESC sd,
sim_cpu *cpu,
address_word cia,
***************
*** 1482,1492 ****
}
default:
! sim_io_error (sd, "TODO: sim_monitor(%d) : PC = 0x%s\n",
! reason, pr_addr(cia));
! break;
}
! return;
}
/* Store a word into memory. */
--- 1482,1491 ----
}
default:
! /* Unknown reason. */
! return 1;
}
! return 0;
}
/* Store a word into memory. */
***************
*** 1840,1846 ****
perform this magic. */
if ((instruction & RSVD_INSTRUCTION_MASK) == RSVD_INSTRUCTION)
{
! sim_monitor (SD, CPU, cia, ((instruction >> RSVD_INSTRUCTION_ARG_SHIFT) & RSVD_INSTRUCTION_ARG_MASK) );
/* NOTE: This assumes that a branch-and-link style
instruction was used to enter the vector (which is the
case with the current IDT monitor). */
--- 1839,1848 ----
perform this magic. */
if ((instruction & RSVD_INSTRUCTION_MASK) == RSVD_INSTRUCTION)
{
! int reason = (instruction >> RSVD_INSTRUCTION_ARG_SHIFT) & RSVD_INSTRUCTION_ARG_MASK;
! if (sim_monitor (SD, CPU, cia, reason))
! sim_io_error (sd, "TODO sim_monitor: reason = %d, pc = 0x%s\n", reason, pr_addr (cia));
!
/* NOTE: This assumes that a branch-and-link style
instruction was used to enter the vector (which is the
case with the current IDT monitor). */
Index: sim-main.h
===================================================================
RCS file: /cvs/cvsfiles/devo/sim/mips/sim-main.h,v
retrieving revision 1.86.10.4
diff -u -c -r1.86.10.4 sim-main.h
*** sim-main.h 2001/02/16 00:32:04 1.86.10.4
--- sim-main.h 2001/02/19 03:17:49
***************
*** 773,779 ****
#define DecodeCoproc(instruction) \
decode_coproc (SD, CPU, cia, (instruction))
! void sim_monitor (SIM_DESC sd, sim_cpu *cpu, address_word cia, unsigned int arg);
--- 773,779 ----
#define DecodeCoproc(instruction) \
decode_coproc (SD, CPU, cia, (instruction))
! int sim_monitor (SIM_DESC sd, sim_cpu *cpu, address_word cia, unsigned int arg);
next reply other threads:[~2001-02-18 19:27 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2001-02-18 19:27 Ben Elliston [this message]
2001-02-19 11:12 ` Andrew Cagney
2001-02-19 12:12 ` Ben Elliston
2001-02-19 13:17 ` Andrew Cagney
2001-02-19 14:37 ` Ben Elliston
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