From: Michael Sturm <michael.sturm@intel.com>
To: mark.kettenis@xs4all.nl, palves@redhat.com, eliz@gnu.org
Cc: gdb-patches@sourceware.org, michael.sturm@intel.com
Subject: [PATCH v2 2/5] Change xstate_bv handling to use 8 bytes of data.
Date: Thu, 01 Dec 2016 13:39:00 -0000 [thread overview]
Message-ID: <1480599538-30543-3-git-send-email-michael.sturm@intel.com> (raw)
In-Reply-To: <1480599538-30543-1-git-send-email-michael.sturm@intel.com>
The size of the state-component bitmap as specified in
Intel(R) 64 and IA-32 Architectures Software Developer's Manual,
Chapter 13.4.2 is 8 bytes.
So far, the data types used for xstate_bv_p (gdb_byte*),
clear_bv (unsigned int) and tdep->xcr0 (uint64_t) were
inconsistent. But, since the xstate components were still
fitting into a single byte, the code still worked
as expected.
However, with the addition of the PKU feature (bit 9),
using one byte for the bitmap will no longer be sufficient.
This patch changes related code to use 64 bit data types
consistently and changes read/write acces of the XSAVE
header in the xsave buffer to use the endianess-aware
functions extract_unsigned_integer and store_unsigned_integer.
gdb/Changelog:
2016-04-18 Michael Sturm <michael.sturm@intel.com>
* i387-tdep.c (i387_supply_xsave): Change type
of clear_bv to ULONGEST. Replace gdb_byte *xstate_bv_p
with ULONGEST xstate_bv and use extract_unsigned_integer
and store_unsigned_integer to read/write its value from
the xsave buffer. This is required to make sure that
eventual differences in endianess between host and
target are taken care off.
(i387_collect_xsave): Replace gdb_byte *xstate_bv_p
with ULONGEST initial_xstate_bv and use
extract_unsigned_integer/store_unsigned_integer to
read/write its value from the xsave buffer.
Change type of clear_bv to ULONGEST.
gdbserver/Changelog:
2016-04-18 Michael Sturm <michael.sturm@intel.com>
* i387-fp.c (i387_cache_to_xsave): Change type of clear_bv to
unsigned long long.
(i387_fxsave_to_cache): Likewise.
Change-Id: I0de254158960b4f7bcbc9fe2fb857034fa1f7ca5
Signed-off-by: Michael Sturm <michael.sturm@intel.com>
---
gdb/gdbserver/i387-fp.c | 8 ++++----
gdb/i387-tdep.c | 33 +++++++++++++++++++++------------
2 files changed, 25 insertions(+), 16 deletions(-)
diff --git a/gdb/gdbserver/i387-fp.c b/gdb/gdbserver/i387-fp.c
index a90729a..d0b0736 100644
--- a/gdb/gdbserver/i387-fp.c
+++ b/gdb/gdbserver/i387-fp.c
@@ -273,14 +273,14 @@ i387_cache_to_xsave (struct regcache *regcache, void *buf)
struct i387_xsave *fp = (struct i387_xsave *) buf;
int i;
unsigned long val, val2;
- unsigned int clear_bv;
unsigned long long xstate_bv = 0;
+ unsigned long long clear_bv = 0;
char raw[64];
char *p;
/* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8;
- /* The supported bits in `xstat_bv' are 1 byte. Clear part in
+ /* The supported bits in `xstat_bv' are 8 bytes. Clear part in
vector registers if its bit in xstat_bv is zero. */
clear_bv = (~fp->xstate_bv) & x86_xcr0;
@@ -643,12 +643,12 @@ i387_xsave_to_cache (struct regcache *regcache, const void *buf)
struct i387_fxsave *fxp = (struct i387_fxsave *) buf;
int i, top;
unsigned long val;
- unsigned int clear_bv;
+ unsigned long long clear_bv;
gdb_byte *p;
/* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8;
- /* The supported bits in `xstat_bv' are 1 byte. Clear part in
+ /* The supported bits in `xstat_bv' are 8 bytes. Clear part in
vector registers if its bit in xstat_bv is zero. */
clear_bv = (~fp->xstate_bv) & x86_xcr0;
diff --git a/gdb/i387-tdep.c b/gdb/i387-tdep.c
index f7a3b55..ef3a631 100644
--- a/gdb/i387-tdep.c
+++ b/gdb/i387-tdep.c
@@ -898,7 +898,7 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
struct gdbarch_tdep *tdep = gdbarch_tdep (gdbarch);
const gdb_byte *regs = (const gdb_byte *) xsave;
int i;
- unsigned int clear_bv;
+ ULONGEST clear_bv;
static const gdb_byte zero[MAX_REGISTER_SIZE] = { 0 };
enum
{
@@ -950,12 +950,15 @@ i387_supply_xsave (struct regcache *regcache, int regnum,
if (regclass != none)
{
- /* Get `xstat_bv'. */
- const gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
+ /* Get `xstat_bv'. The supported bits in `xstat_bv' are 8 bytes. */
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+ ULONGEST xstate_bv = 0;
- /* The supported bits in `xstat_bv' are 1 byte. Clear part in
- vector registers if its bit in xstat_bv is zero. */
- clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
+ xstate_bv = extract_unsigned_integer (XSAVE_XSTATE_BV_ADDR (regs),
+ 8, byte_order);
+
+ /* Clear part in vector registers if its bit in xstat_bv is zero. */
+ clear_bv = (~(xstate_bv)) & tdep->xcr0;
}
else
clear_bv = X86_XSTATE_ALL_MASK;
@@ -1333,11 +1336,14 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
if ((regclass & check))
{
gdb_byte raw[I386_MAX_REGISTER_SIZE];
- gdb_byte *xstate_bv_p = XSAVE_XSTATE_BV_ADDR (regs);
- unsigned int xstate_bv = 0;
- /* The supported bits in `xstat_bv' are 1 byte. */
- unsigned int clear_bv = (~(*xstate_bv_p)) & tdep->xcr0;
+ ULONGEST initial_xstate_bv, clear_bv, xstate_bv = 0;
gdb_byte *p;
+ enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
+
+ /* The supported bits in `xstat_bv' are 8 bytes. */
+ initial_xstate_bv = extract_unsigned_integer (XSAVE_XSTATE_BV_ADDR (regs),
+ 8, byte_order);
+ clear_bv = (~(initial_xstate_bv)) & tdep->xcr0;
/* Clear register set if its bit in xstat_bv is zero. */
if (clear_bv)
@@ -1619,8 +1625,11 @@ i387_collect_xsave (const struct regcache *regcache, int regnum,
registers are changed. */
if (xstate_bv)
{
- /* The supported bits in `xstat_bv' are 1 byte. */
- *xstate_bv_p |= (gdb_byte) xstate_bv;
+ /* The supported bits in `xstat_bv' are 8 bytes. */
+ initial_xstate_bv |= xstate_bv;
+ store_unsigned_integer (XSAVE_XSTATE_BV_ADDR (regs),
+ 8, byte_order,
+ initial_xstate_bv);
switch (regclass)
{
--
1.8.4.2
next prev parent reply other threads:[~2016-12-01 13:39 UTC|newest]
Thread overview: 15+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-12-01 13:39 [PATCH v2 0/5] Add support for PKRU register to GDB and GDBServer Michael Sturm
2016-12-01 13:39 ` [PATCH v2 4/5] Add target description for avx-avx512 Michael Sturm
2016-12-01 13:39 ` Michael Sturm [this message]
2016-12-02 1:26 ` [PATCH v2 2/5] Change xstate_bv handling to use 8 bytes of data Luis Machado
2016-12-05 13:52 ` Sturm, Michael
2016-12-01 13:39 ` [PATCH v2 5/5] Add support for Intel PKRU register to GDB and GDBserver Michael Sturm
2016-12-01 17:35 ` Eli Zaretskii
2016-12-02 2:00 ` Luis Machado
2016-12-06 10:54 ` Sturm, Michael
2016-12-09 17:16 ` Pedro Alves
2016-12-19 9:17 ` Sturm, Michael
2016-12-01 13:39 ` [PATCH v2 3/5] Rename target descriptions to reflect actual content of description Michael Sturm
2016-12-01 13:39 ` [PATCH v2 1/5] Sync up x86-gcc-cpuid.h with cpuid.h from gcc-6 branch Michael Sturm
2016-12-02 1:17 ` Luis Machado
2016-12-05 13:42 ` Sturm, Michael
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