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* [patch] Fix MIPS32 DSP simulator bugs
@ 2006-05-10  1:32 Chao-ying Fu
  2006-05-15 16:12 ` Daniel Jacobowitz
  0 siblings, 1 reply; 3+ messages in thread
From: Chao-ying Fu @ 2006-05-10  1:32 UTC (permalink / raw)
  To: gdb-patches; +Cc: Thekkath, Radhika

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Hello,

  This patch fixed bugs in MIPS32 DSP rounding instructions.
Test with mipsisa32-elf and mipsisa64-elf.

  Is it ok to check in?  Thanks a lot!

Regards,
Chao-ying

src/sim/mips/ChangeLog
2006-05-09  Chao-ying Fu  <fu@mips.com>

        dsp.igen (do_ph_shift, do_w_shra): Fix bugs for rounding
instructions.

src/sim/testsuite/sim/mips/ChangeLog
2006-05-09  Chao-ying Fu  <fu@mips.com>

       * mips32-dsp.s: Add some tests for shra_r.ph, shrav_r.ph, shra_r.w,
       shrav_r.w.

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Index: mips/dsp.igen
===================================================================
RCS file: /cvs/src/src/sim/mips/dsp.igen,v
retrieving revision 1.1
diff -c -3 -p -r1.1 dsp.igen
*** mips/dsp.igen	14 Dec 2005 23:07:56 -0000	1.1
--- mips/dsp.igen	10 May 2006 01:17:30 -0000
***************
*** 193,201 ****
  	}
        else // right
  	{
! 	  if (sat == 1 && shift != 0)
! 	    h0 += (1 << (shift - 1));
! 	  h0 = h0 >> shift;
  	}
  
        result |= ((unsigned32)((unsigned16)h0) << i);
--- 193,202 ----
  	}
        else // right
  	{
! 	  if (sat == 1 && shift != 0 && (h0 & (1 << (shift-1))))
! 	    h0 = (h0 >> shift) + 1;
! 	  else
! 	    h0 = h0 >> shift;
  	}
  
        result |= ((unsigned32)((unsigned16)h0) << i);
***************
*** 246,254 ****
  {
    unsigned32 result = GPR[rt];
    signed32 h0 = (signed32)result;
!   if (shift != 0)
!     h0 += (1 << (shift - 1));
!   h0 = h0 >> shift;
    GPR[rd] = EXTEND32 (h0);
  }
  
--- 247,256 ----
  {
    unsigned32 result = GPR[rt];
    signed32 h0 = (signed32)result;
!   if (shift != 0 && (h0 & (1 << (shift-1))))
!     h0 = (h0 >> shift) + 1;
!   else
!     h0 = h0 >> shift;
    GPR[rd] = EXTEND32 (h0);
  }
  
Index: testsuite/sim/mips/mips32-dsp.s
===================================================================
RCS file: /cvs/src/src/sim/testsuite/sim/mips/mips32-dsp.s,v
retrieving revision 1.1
diff -c -3 -p -r1.1 mips32-dsp.s
*** testsuite/sim/mips/mips32-dsp.s	14 Dec 2005 23:09:26 -0000	1.1
--- testsuite/sim/mips/mips32-dsp.s	10 May 2006 01:17:33 -0000
*************** DIAG:
*** 332,343 ****
--- 332,348 ----
  	dspck_dtsaio shra_r.ph, 0x10001, 0x20001, 1, 0x0, 0x0
  	dspck_dtsaio shra_r.ph, 0x10001, 0x10001, 1, 0x0, 0x0
  	dspck_dtsaio shra_r.ph, 0x0, 0x10001, 2, 0x0, 0x0
+ 	dspck_dtsaio shra_r.ph, 0x7fff8000, 0x7fff8000, 0, 0x0, 0x0
+ 	dspck_dtsaio shra_r.ph, 0x4000c000, 0x7fff8000, 1, 0x0, 0x0
+ 	dspck_dtsaio shra_r.ph, 0x2000e000, 0x7ffe8000, 2, 0x0, 0x0
  
  	writemsg "[44] Test shrav_r.ph"
  	dspck_dstio shrav_r.ph, 0x20001, 0x30002, 0x1, 0x0, 0x0
  	dspck_dstio shrav_r.ph, 0x10001, 0x20001, 0x1, 0x0, 0x0
  	dspck_dstio shrav_r.ph, 0x10001, 0x10001, 0x1, 0x0, 0x0
  	dspck_dstio shrav_r.ph, 0x0, 0x10001, 0x2, 0x0, 0x0
+ 	dspck_dstio shrav_r.ph, 0x7fff8000, 0x7fff8000, 0, 0x0, 0x0
+ 	dspck_dstio shrav_r.ph, 0x2000e000, 0x7fff8000, 2, 0x0, 0x0
  
  	writemsg "[45] Test shra_r.w"
  	dspck_dtsaio shra_r.w, 0x1, 0x2, 1, 0x0, 0x0
*************** DIAG:
*** 345,350 ****
--- 350,358 ----
  	dspck_dtsaio shra_r.w, 0x8001, 0x10001, 1, 0x0, 0x0
  	dspck_dtsaio shra_r.w, 0x1, 0x10001, 17, 0x0, 0x0
  	dspck_dtsaio shra_r.w, 0xffffc001, 0x80010001, 17, 0x0, 0x0
+ 	dspck_dtsaio shra_r.w, 0x7fffffff, 0x7fffffff, 0, 0x0, 0x0
+ 	dspck_dtsaio shra_r.w, 0x40000000, 0x7fffffff, 1, 0x0, 0x0
+ 	dspck_dtsaio shra_r.w, 0x20000000, 0x7ffffffe, 2, 0x0, 0x0
  
  	writemsg "[46] Test shrav_r.w"
  	dspck_dstio shrav_r.w, 0x1, 0x2, 0x1, 0x0, 0x0
*************** DIAG:
*** 352,357 ****
--- 360,368 ----
  	dspck_dstio shrav_r.w, 0x8001, 0x10001, 0x1, 0x0, 0x0
  	dspck_dstio shrav_r.w, 0x8001, 0x10001, 0x21, 0x0, 0x0
  	dspck_dstio shrav_r.w, 0x4000, 0x10001, 0x2, 0x0, 0x0
+ 	dspck_dstio shrav_r.w, 0x7fffffff, 0x7fffffff, 0x0, 0x0, 0x0
+ 	dspck_dstio shrav_r.w, 0x10000000, 0x7ffffffc, 0x3, 0x0, 0x0
+ 	dspck_dstio shrav_r.w, 0x08000000, 0x7ffffff8, 0x4, 0x0, 0x0
  
  	writemsg "[47] Test muleu_s.ph.qbl"
  	dspck_dstio muleu_s.ph.qbl, 0x0, 0x0, 0x0, 0x0, 0x0

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2006-05-10  1:32 [patch] Fix MIPS32 DSP simulator bugs Chao-ying Fu
2006-05-15 16:12 ` Daniel Jacobowitz
2006-05-15 21:53   ` Chao-ying Fu

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