From mboxrd@z Thu Jan  1 00:00:00 1970
From: cl@linux.com (Christoph Lameter)
Date: Thu, 30 Apr 2009 10:12:54 -0400 (EDT)
Subject: [ltt-dev] [PATCH] Fix dirty page accounting in
 redirty_page_for_writepage()
In-Reply-To: <20090430141211.GB5922@Krystal>
References: <20090429232546.GB15782@Krystal>
	<alpine.LFD.2.00.0904291701450.22156@localhost.localdomain>
	<20090430024303.GB19875@Krystal> <20090430062140.GA9559@elte.hu>
	<20090430063306.GA27431@Krystal> <20090430065055.GA16277@elte.hu>
	<alpine.DEB.1.10.0904300926530.22262@qirst.com>
	<20090430141211.GB5922@Krystal>
Message-ID: <alpine.DEB.1.10.0904301009530.14178@qirst.com>

On Thu, 30 Apr 2009, Mathieu Desnoyers wrote:

> > The 3 variants on x86 generate the same instructions. On other platforms
> > they would need to be able to fallback in various way depending on the
> > availability of instructions that are atomic vs. preempt or irqs.
> >
>
> The problem here, as we did figure out a while ago with the atomic
> slub we worked on a while ago, is that if we have the following code :
>
> local_irq_save
> var++
> var++
> local_irq_restore
>
> that we would like to turn into irq-safe percpu variant with this
> semantic :
>
> percpu_add_irqsafe(var)
> percpu_add_irqsafe(var)
>
> We are generating two irq save/restore in the fallback, which will be
> slow.
>
> However, we could do the following trick :
>
> percpu_irqsave(flags);
> percpu_add_irq(var);
> percpu_add_irq(var);
> percpu_irqrestore(flags);

Hmmm.I do not remember any of those double ops in the patches that I did a
while back for this. It does not make sense either because atomic per cpu
ops are only atomic for a single instruction. You are trying to extend
that so that multiple "atomic" instructions are now atomic.