From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id sGqKLZKGk2SBRQoAWB0awg (envelope-from ) for ; Wed, 21 Jun 2023 19:24:02 -0400 Authentication-Results: simark.ca; dkim=pass (2048-bit key; unprotected) header.d=lists.lttng.org header.i=@lists.lttng.org header.a=rsa-sha256 header.s=default header.b=I1MxJw4F; dkim-atps=neutral Received: by simark.ca (Postfix, from userid 112) id B6E611E0BB; Wed, 21 Jun 2023 19:24:02 -0400 (EDT) Received: from lists.lttng.org (lists.lttng.org [167.114.26.123]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id AE98C1E00F for ; Wed, 21 Jun 2023 19:24:00 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=lists.lttng.org; s=default; t=1687389840; bh=HZFUkS3UkRQTgiwFMHDziFHkYSOzvE9BBKx5ciE5pDs=; h=Date:To:References:In-Reply-To:Subject:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=I1MxJw4F4gMNHB6h8ATlY7o3WQ2Nq0xM3h4vqgX6OrtYBsZD8D2tU7wJsWKCrZ5hl /nq6ZDkGgGZ+YvwLHetOk13UYOLwrZZ6BFL1ToDFbpkMeI1BHPhViAPTw5Cg+QdZwW t3z0Xkx+01iQln0iaXxufosHsn9qKud5XdglU2T68oakScza8Fxv+5iBLe461J0sWa EoL2rOVgM90ZBga4+cPMafbxDAo658L0qGa2AmSuui3jjp5i3Y6cgV0TxyjDNnyQiC f6MFGQXOqRMOGhAA+/u4VXbbDcBTADy2qmPOupiBfiMob91s+IrQUYODZQMgNeqXfr ca20PJ7pMDhZw== Received: from lists-lttng01.efficios.com (localhost [IPv6:::1]) by lists.lttng.org (Postfix) with ESMTP id 4Qmfhc28R9z203m; Wed, 21 Jun 2023 19:24:00 -0400 (EDT) Received: from dfw.source.kernel.org (dfw.source.kernel.org [139.178.84.217]) by lists.lttng.org (Postfix) with ESMTPS id 4Qmfhb5ptxz203l for ; Wed, 21 Jun 2023 19:23:59 -0400 (EDT) Received: from smtp.kernel.org (relay.kernel.org [52.25.139.140]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits)) (No client certificate requested) by dfw.source.kernel.org (Postfix) with ESMTPS id 3D359616F5; Wed, 21 Jun 2023 23:23:59 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id 9F454C433C0; Wed, 21 Jun 2023 23:23:58 +0000 (UTC) Received: by paulmck-ThinkPad-P17-Gen-1.home (Postfix, from userid 1000) id 52BBDCE23B2; Wed, 21 Jun 2023 16:23:58 -0700 (PDT) Date: Wed, 21 Jun 2023 16:23:58 -0700 To: Olivier Dion Message-ID: <81bdddb0-0a8e-4ce7-a40d-789bba0a74e2@paulmck-laptop> References: <20230515201718.9809-1-odion@efficios.com> <20230607185359.8125-5-odion@efficios.com> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20230607185359.8125-5-odion@efficios.com> Subject: Re: [lttng-dev] [PATCH v2 04/12] urcu/system: Use atomic builtins if configured X-BeenThere: lttng-dev@lists.lttng.org X-Mailman-Version: 2.1.39 Precedence: list List-Id: LTTng development list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: "Paul E. McKenney via lttng-dev" Reply-To: paulmck@kernel.org Cc: Tony Finch , lttng-dev@lists.lttng.org Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Errors-To: lttng-dev-bounces@lists.lttng.org Sender: "lttng-dev" On Wed, Jun 07, 2023 at 02:53:51PM -0400, Olivier Dion wrote: > If configured to use atomic builtins, use them for implementing the > CMM_LOAD_SHARED and CMM_STORE_SHARED macros. > > Change-Id: I3eaaaaf0d26c47aced6e94b40fd59c7b8baa6272 > Co-authored-by: Mathieu Desnoyers > Signed-off-by: Olivier Dion > --- > include/urcu/system.h | 21 +++++++++++++++++++++ > 1 file changed, 21 insertions(+) > > diff --git a/include/urcu/system.h b/include/urcu/system.h > index faae390..f184aad 100644 > --- a/include/urcu/system.h > +++ b/include/urcu/system.h > @@ -19,9 +19,28 @@ > * all copies or substantial portions of the Software. > */ > > +#include > #include > #include > > +#ifdef CONFIG_RCU_USE_ATOMIC_BUILTINS > + > +#define CMM_LOAD_SHARED(x) \ > + __atomic_load_n(&(x), __ATOMIC_RELAXED) > + > +#define _CMM_LOAD_SHARED(x) CMM_LOAD_SHARED(x) > + > +#define CMM_STORE_SHARED(x, v) \ > + __extension__ \ > + ({ \ > + __typeof__(v) _v = (v); \ > + __atomic_store_n(&(x), _v, __ATOMIC_RELAXED); \ > + _v; \ > + }) > + > +#define _CMM_STORE_SHARED(x, v) CMM_STORE_SHARED(x, v) Same question here on loss of volatile semantics. Thanx, Paul > + > +#else > /* > * Identify a shared load. A cmm_smp_rmc() or cmm_smp_mc() should come > * before the load. > @@ -56,4 +75,6 @@ > _v = _v; /* Work around clang "unused result" */ \ > }) > > +#endif /* CONFIG_RCU_USE_ATOMIC_BUILTINS */ > + > #endif /* _URCU_SYSTEM_H */ > -- > 2.40.1 > _______________________________________________ lttng-dev mailing list lttng-dev@lists.lttng.org https://lists.lttng.org/cgi-bin/mailman/listinfo/lttng-dev