From mboxrd@z Thu Jan 1 00:00:00 1970 From: paulmck@linux.vnet.ibm.com (Paul E. McKenney) Date: Thu, 4 Aug 2016 07:58:24 -0700 Subject: [lttng-dev] RCU on non-cache-coherent memory In-Reply-To: <1648244903.1131.1470178737812.JavaMail.zimbra@efficios.com> References: <1648244903.1131.1470178737812.JavaMail.zimbra@efficios.com> Message-ID: <20160804145824.GI3482@linux.vnet.ibm.com> On Tue, Aug 02, 2016 at 10:58:57PM +0000, Mathieu Desnoyers wrote: > ----- On Aug 1, 2016, at 8:30 PM, Yuxin Ren ryx at gwmail.gwu.edu wrote: > > > Hi all, > > > > Is there any research or publications about RCU on top of > > non-cache-coherent multi-core architecture? > > Not only RCU, any other synchronization technique on top of > > non-cache-coherent multi-core > > is also helpful. > > CCing Paul E. McKenney, who might know more on this topic. > > Back in 2009 when I started the liburcu.org project, I > planned to eventually add support for such architectures, > e.g. Blackfin, which is why I initially added the cmm_mc(), > cmm_rmc() and cmm_wmc() macros in the library (see > CONFIG_HAVE_MEM_COHERENCY). However, all currently implemented > architectures have mem coherency, so it's always defined as a > simple compiler barrier. See include/urcu/arch/generic.h in liburcu > for details. Mathieu pretty much covered it. We only have theoretical experience with non-cache-coherent systems. You might want to contact the authors of these papers: http://www.sigops.org/sosp/sosp11/posters/summaries/sosp11-final7.pdf http://arxiv.org/pdf/1301.4490.pdf There are probably others, as this was a hot topic a couple of years ago. Thanx, Paul