From mboxrd@z Thu Jan  1 00:00:00 1970
From: kosaki.motohiro@jp.fujitsu.com (KOSAKI Motohiro)
Date: Thu, 19 Feb 2009 09:29:44 +0900 (JST)
Subject: [ltt-dev] [patch 4/7] omap lttng use iter div
In-Reply-To: <20090218075132.874024744@polymtl.ca>
References: <20090218074703.163707091@polymtl.ca>
	<20090218075132.874024744@polymtl.ca>
Message-ID: <20090219092852.9553.A69D9226@jp.fujitsu.com>

> ARM does no seem to like u64 div in math64.h. Use the "iter" version.
> 
> Signed-off-by: Mathieu Desnoyers <mathieu.desnoyers at polymtl.ca>
> ---
>  kernel/trace/trace-clock-32-to-64.c |    8 +++++---
>  1 file changed, 5 insertions(+), 3 deletions(-)
> 
> Index: linux-omap-2.6/kernel/trace/trace-clock-32-to-64.c
> ===================================================================
> --- linux-omap-2.6.orig/kernel/trace/trace-clock-32-to-64.c	2009-02-16 00:39:18.000000000 +0000
> +++ linux-omap-2.6/kernel/trace/trace-clock-32-to-64.c	2009-02-16 00:41:42.000000000 +0000
> @@ -153,13 +153,15 @@
>   */
>  static int __init precalc_stsc_interval(void)
>  {
> +	u64 rem_freq, rem_interval;
> +
>  	precalc_expire =
> -		div_u64(HW_BITMASK,
> -		 ((div_u64(trace_clock_frequency(), HZ)
> +		__iter_div_u64_rem(HW_BITMASK,
> +		 ((__iter_div_u64_rem(trace_clock_frequency(), HZ, &rem_freq)
>  		     * trace_clock_freq_scale())
>  		    << 1)
>  		 - 1
> -		 - (EXPECTED_INTERRUPT_LATENCY * HZ / 1000))
> +		 - (EXPECTED_INTERRUPT_LATENCY * HZ / 1000), &rem_interval)
>  		>> 1;
>  	WARN_ON(precalc_expire == 0);
>  	printk(KERN_DEBUG "Synthetic TSC timer will fire each %u jiffies.\n",

Instead, implement div_u64() for arm is bad idea?