From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 29132 invoked by alias); 20 Feb 2006 05:07:24 -0000 Received: (qmail 28971 invoked by uid 22791); 20 Feb 2006 05:07:23 -0000 X-Spam-Check-By: sourceware.org Received: from gandalf.inter.net.il (HELO gandalf.inter.net.il) (192.114.186.17) by sourceware.org (qpsmtpd/0.31) with ESMTP; Mon, 20 Feb 2006 05:07:21 +0000 Received: from nitzan.inter.net.il (nitzan.inter.net.il [192.114.186.20]) by gandalf.inter.net.il (MOS 3.7.1-GA) with ESMTP id HXV15606; Mon, 20 Feb 2006 07:06:57 +0200 (IST) Received: from HOME-C4E4A596F7 (IGLD-80-230-52-188.inter.net.il [80.230.52.188]) by nitzan.inter.net.il (MOS 3.7.3-GA) with ESMTP id CSZ93459 (AUTH halo1); Mon, 20 Feb 2006 07:06:56 +0200 (IST) Date: Mon, 20 Feb 2006 07:25:00 -0000 Message-Id: From: Eli Zaretskii To: Paul Koning , ghost@cs.msu.su CC: gdb@sources.redhat.com In-reply-to: <20060219215433.GA25853@nevyn.them.org> (message from Daniel Jacobowitz on Sun, 19 Feb 2006 16:54:33 -0500) Subject: Re: MI: reporting of multiple breakpoints Reply-to: Eli Zaretskii References: <17398.11182.747232.774924@gargle.gargle.HOWL> <20060217200712.GB30145@nevyn.them.org> <17398.12047.624911.347942@gargle.gargle.HOWL> <20060217202047.GC30881@nevyn.them.org> <17398.15554.431196.208031@gargle.gargle.HOWL> <20060217211942.GA609@nevyn.them.org> <17400.46121.875000.537237@gargle.gargle.HOWL> <20060219215433.GA25853@nevyn.them.org> X-IsSubscribed: yes Mailing-List: contact gdb-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sourceware.org X-SW-Source: 2006-02/txt/msg00263.txt.bz2 > Date: Sun, 19 Feb 2006 16:54:33 -0500 > From: Daniel Jacobowitz > Cc: Paul Koning , ghost@cs.msu.su, > gdb@sources.redhat.com > > > > exception will deliver the PC of the instruction doing the store, or > > > that PC can be deduced. > > > > I think this happens on _all_ platforms that support watchpoints. > > Really? On x86, I suspect that the exception is always at the > instruction following the store; so it's possible, although > non-trivial, to identify the store by backtracking. The exception happens right when the store is written, and we find the PC to be after the faulting instruction, when the inferior stops. The faulting instruction is the one that corresponds to the previous PC value. > > Again, the place that caused the store is known (and shown to the > > user), but the place where the inferior is stopped is a different > > place on many architectures, including x86. Wed are arguing about the > > latter, not the former. > > Could you give me an example? What should the example show? > I think that is desirable, but not at all what we do today - I have > no idea how to retrieve the address of the store when I stop at a > watchpoint. We show the old and new value, but that's it. We also show the current source line, don't we? Are you saying that we show the wrong line?