From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 31984 invoked by alias); 17 Feb 2006 20:08:15 -0000 Received: (qmail 31974 invoked by uid 22791); 17 Feb 2006 20:08:15 -0000 X-Spam-Check-By: sourceware.org Received: from gandalf.inter.net.il (HELO gandalf.inter.net.il) (192.114.186.17) by sourceware.org (qpsmtpd/0.31) with ESMTP; Fri, 17 Feb 2006 20:08:12 +0000 Received: from nitzan.inter.net.il (nitzan.inter.net.il [192.114.186.20]) by gandalf.inter.net.il (MOS 3.7.1-GA) with ESMTP id HXH04371; Fri, 17 Feb 2006 22:07:56 +0200 (IST) Received: from HOME-C4E4A596F7 (IGLD-80-230-152-98.inter.net.il [80.230.152.98]) by nitzan.inter.net.il (MOS 3.7.3-GA) with ESMTP id CSO04818 (AUTH halo1); Fri, 17 Feb 2006 22:07:55 +0200 (IST) Date: Fri, 17 Feb 2006 20:14:00 -0000 Message-Id: From: Eli Zaretskii To: Paul Koning CC: ghost@cs.msu.su, gdb@sources.redhat.com In-reply-to: <17398.11182.747232.774924@gargle.gargle.HOWL> (message from Paul Koning on Fri, 17 Feb 2006 15:01:50 -0500) Subject: Re: MI: reporting of multiple breakpoints Reply-to: Eli Zaretskii References: <20060217153211.GA21402@nevyn.them.org> <20060217194426.GA28988@nevyn.them.org> <17398.11182.747232.774924@gargle.gargle.HOWL> X-IsSubscribed: yes Mailing-List: contact gdb-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sourceware.org X-SW-Source: 2006-02/txt/msg00208.txt.bz2 > Date: Fri, 17 Feb 2006 15:01:50 -0500 > From: Paul Koning > Cc: ghost@cs.msu.su, gdb@sources.redhat.com > > It is a bad thing for the break at x to fail due to the bad luck of > having a watch exception at the preceding instruction. I agree. But the current code was written for a reason, I think, so I'm curious to know what was that reason. > If the two stops happened to be the SAME instruction, then you have > plausible deniability. Yes; except that if they happen on the same instruction, they are still two different events: the breakpoint breaks _before_ the instruction, the watchpoint _after_ it. At least on x86. So we can announce both even in this case.