From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id Hu0VH3ci72X1kgIAWB0awg (envelope-from ) for ; Mon, 11 Mar 2024 11:25:43 -0400 Authentication-Results: simark.ca; dkim=pass (1024-bit key; secure) header.d=sourceware.org header.i=@sourceware.org header.a=rsa-sha256 header.s=default header.b=L6KI+Ggp; dkim-atps=neutral Received: by simark.ca (Postfix, from userid 112) id 6D7451E0D2; Mon, 11 Mar 2024 11:25:43 -0400 (EDT) Received: from server2.sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature ECDSA (prime256v1) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 561CC1E0AC for ; Mon, 11 Mar 2024 11:25:41 -0400 (EDT) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id 6A465385842B for ; Mon, 11 Mar 2024 15:25:40 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org 6A465385842B DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1710170740; bh=WAI4tHHDbLgRHpGT2lMhmVzFm/XgYQkCqiyiTDAkFsY=; h=Date:To:Cc:References:Subject:In-Reply-To:List-Id: List-Unsubscribe:List-Archive:List-Post:List-Help:List-Subscribe: From:Reply-To:From; b=L6KI+GgpXs3chSvm+uSZs3dQVybKb27s6FCcq5dDv209+PN1K54BpUX6Zb2L9cDor nbn+skc9e7hJmKmCfd1XPK6APRxZ92EXON0onu9zmVSmOC6PmZxATr1raN5NAaRVhS Ig14MyY2OY9RDa9igJ8RHiL0I7cCoXPLEvZDEmlM= Received: from us-smtp-delivery-124.mimecast.com (us-smtp-delivery-124.mimecast.com [170.10.133.124]) by sourceware.org (Postfix) with ESMTPS id EB8593858CD1 for ; Mon, 11 Mar 2024 15:24:57 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.4.2 sourceware.org EB8593858CD1 ARC-Filter: OpenARC Filter v1.0.0 sourceware.org EB8593858CD1 ARC-Seal: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1710170699; cv=none; b=xB01GTculOYrMyu8C+BQbvC50NrlWXdw/NPryn1cj+U4lqzqKdg2svq6z2EOcH4o3L9PBMen91Cg6n4dmQqqZjTz81XFSh3sRkmgv2ibdVl1pDKk+mlLPHslrX9a+vRSkDFcEiMz/aMqCtAgb1DnKf7xz5xenmJUXW0P91iaIjI= ARC-Message-Signature: i=1; a=rsa-sha256; d=sourceware.org; s=key; t=1710170699; c=relaxed/simple; bh=yJ8cPxrOM0GKfifriNb0ZHK+PMBO+B5PJkkUH+WT8bg=; h=DKIM-Signature:Message-ID:Date:MIME-Version:To:From:Subject; b=PUDEo9Ftt7JbUvFOvzhrbnLCpzpz9f8aGNrcS1y4TmMP+ZV1UaqMvxidZh5qWmDTLk2fZHa2h5IW/VwYbfSFLg2XVHfu6JwzC6zQcME3pegIJtKbfX3TUt4jAJmChWB2PbyKq57B0cxTd/9tWlVig7Q+ywZTtibnUbG4J/yYgTI= ARC-Authentication-Results: i=1; server2.sourceware.org Received: from mimecast-mx02.redhat.com (mx-ext.redhat.com [66.187.233.73]) by relay.mimecast.com with ESMTP with STARTTLS (version=TLSv1.3, cipher=TLS_AES_256_GCM_SHA384) id us-mta-608-b8rh92UJOe-SQ9eyg4Aptg-1; Mon, 11 Mar 2024 11:24:53 -0400 X-MC-Unique: b8rh92UJOe-SQ9eyg4Aptg-1 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.rdu2.redhat.com [10.11.54.1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by mimecast-mx02.redhat.com (Postfix) with ESMTPS id 968053C0ED54; Mon, 11 Mar 2024 15:24:53 +0000 (UTC) Received: from [10.39.194.148] (unknown [10.39.194.148]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3A62E3C21; Mon, 11 Mar 2024 15:24:53 +0000 (UTC) Message-ID: Date: Mon, 11 Mar 2024 15:24:52 +0000 MIME-Version: 1.0 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:102.0) Gecko/20100101 Thunderbird/102.15.1 To: Shiro B Cc: gdb@sourceware.org References: Subject: Re: Inquiry on AArch64 Simulator in GDB In-Reply-To: X-Scanned-By: MIMEDefang 3.4.1 on 10.11.54.1 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Content-Language: en-GB Content-Type: text/plain; charset=UTF-8; format=flowed Content-Transfer-Encoding: 8bit X-Spam-Status: No, score=-5.6 required=5.0 tests=BAYES_00, DKIMWL_WL_HIGH, DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, DKIM_VALID_EF, NICE_REPLY_A, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H4, RCVD_IN_MSPIKE_WL, SPF_HELO_NONE, SPF_NONE, TXREP, T_SCC_BODY_TEXT_LINE autolearn=ham autolearn_force=no version=3.4.6 X-Spam-Checker-Version: SpamAssassin 3.4.6 (2021-04-09) on server2.sourceware.org X-BeenThere: gdb@sourceware.org X-Mailman-Version: 2.1.30 Precedence: list List-Id: Gdb mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Andrew Dinn via Gdb Reply-To: Andrew Dinn Errors-To: gdb-bounces+public-inbox=simark.ca@sourceware.org Sender: "Gdb" On 11/03/2024 11:31, Shiro B wrote: > Thank you very much for your comprehensive response regarding the > AArch64 simulator. A userspace simulator is all I need, and this seems > will be very helpful to my project. Glad to be able to help. > During my exploration and testing, I believe I may have stumbled upon a > bug related to the UMINV instruction, as detailed in the ARM > documentation > (https://developer.arm.com/documentation/ddi0596/2020-12/SIMD-FP-Instructions/UMINV--Unsigned-Minimum-across-Vector-?lang=en ). According to ARM's specifications, it appears that after comparing and identifying the minimum value in a vector, the result should be stored in a floating-point/vector register, rather than a general-purpose register. The relevant code can be found here: https://sourceware.org/git/?p=binutils-gdb.git;a=blob;f=sim/aarch64/simulator.c;h=1dde0b478c3d1bc9b88a63dd703225c9a2bb3703;hb=HEAD#l4482 > > Admittedly, my familiarity with ARM64, especially SIMD instructions, is > not very extensive. However, through testing, I've noticed that the > simulation's outcome for this instruction indeed differs from that of an > actual CPU. > > Could you please take a look at this observation and provide your > insights? I'm keen to understand whether this discrepancy could be > attributed to my limited understanding or if it indeed points to a > potential oversight in the simulator's implementation of the UMINV > instruction (and also UMAXV, SMINV, SMAXV). > > Thank you once again for your invaluable feedback and for considering my > query. I look forward to your expert opinion on this matter. Yes, I agree that is an error. The spec clearly states that all four instructions should place the result in the "SIMD&FP destination register encoded in the "Rd" field". Well done for spotting it. regards, Andrew Dinn -----------