From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 8842 invoked by alias); 22 Oct 2008 16:48:15 -0000 Received: (qmail 8831 invoked by uid 22791); 22 Oct 2008 16:48:14 -0000 X-Spam-Check-By: sourceware.org Received: from ti-out-0910.google.com (HELO ti-out-0910.google.com) (209.85.142.184) by sourceware.org (qpsmtpd/0.31) with ESMTP; Wed, 22 Oct 2008 16:47:37 +0000 Received: by ti-out-0910.google.com with SMTP id d10so1574664tib.12 for ; Wed, 22 Oct 2008 09:47:34 -0700 (PDT) Received: by 10.110.37.3 with SMTP id k3mr7117780tik.36.1224694053973; Wed, 22 Oct 2008 09:47:33 -0700 (PDT) Received: by 10.110.42.9 with HTTP; Wed, 22 Oct 2008 09:47:33 -0700 (PDT) Message-ID: Date: Wed, 22 Oct 2008 16:48:00 -0000 From: teawater To: "Daniel Jacobowitz" , teawater , "Jakob Engblom" , "Michael Snyder" , gdb@sourceware.org Subject: Re: [discuss] semantics, "replay debugging" vs. "reverse debugging" In-Reply-To: MIME-Version: 1.0 Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: 7bit Content-Disposition: inline References: <48FBDA34.6020104@vmware.com> <007e01c9334e$aad56ff0$00804fd0$@com> <20081022133716.GA10237@caradoc.them.org> X-IsSubscribed: yes Mailing-List: contact gdb-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sourceware.org X-SW-Source: 2008-10/txt/msg00086.txt.bz2 And I think reverse without record in X86 is impossible beause the size of its insn is not same. On Thu, Oct 23, 2008 at 00:42, teawater wrote: > Sorry I am wrong. > In ARM, Just adds set cpsr reg. So: > add r0,r0,#10 > Can reverse without record too. > > > On Thu, Oct 23, 2008 at 00:18, teawater wrote: >> I think your mean that add is a X86 instruction or ARM insn. But some >> arch's add not set flag such as MIPS. >> >> addiu $1, $1, 10 >> >> It not set anything except $1. >> >> And I said add insn just a example, I am not say for each arch and >> each insn? just some of them. >> >> >> >> On Wed, Oct 22, 2008 at 21:37, Daniel Jacobowitz wrote: >>> >>> On Wed, Oct 22, 2008 at 11:25:17AM +0800, teawater wrote: >>> > I think your not clear my idea. >>> > >>> > > I think maybe some instruction can do it. >>> > > Such as add instruction. When it forward execute, it add some number >>> > > to a value of register. When it reverse, it can sub this number from >>> > > the value of register. It can reverse without record. >>> > >>> > Maybe you can read this part again. >>> > >>> > And what is the status of program? Most of time, it's just the values >>> > of registers and memory. Do not think anything that complex. >>> >>> Jakob is right. For instance, if the add instruction sets an overflow >>> flag in the status register, you can not figure out what the previous >>> version of the overflow flag was after the instruction. >>> >>> -- >>> Daniel Jacobowitz >>> CodeSourcery >> >