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From: teawater <teawater@gmail.com>
To: "Daniel Jacobowitz" <drow@false.org>,
	teawater <teawater@gmail.com>,
	 	"Jakob Engblom" <jakob@virtutech.com>,
	 	"Michael Snyder" <msnyder@vmware.com>,
	gdb@sourceware.org
Subject: Re: [discuss] semantics, "replay debugging" vs. "reverse debugging"
Date: Wed, 22 Oct 2008 16:43:00 -0000	[thread overview]
Message-ID: <daef60380810220942k54b71486l6ab915cf6d3a9c09@mail.gmail.com> (raw)
In-Reply-To: <daef60380810220918i3e3e1493mdd4af64ff919ac08@mail.gmail.com>

Sorry I am wrong.
In ARM, Just adds set cpsr reg. So:
add r0,r0,#10
Can reverse without record too.


On Thu, Oct 23, 2008 at 00:18, teawater <teawater@gmail.com> wrote:
> I think your mean that add is a X86 instruction or ARM insn. But some
> arch's add not set flag such as MIPS.
>
> addiu $1, $1, 10
>
> It not set anything except $1.
>
> And I said add insn just a example, I am not say for each arch and
> each insn? just some of them.
>
>
>
> On Wed, Oct 22, 2008 at 21:37, Daniel Jacobowitz <drow@false.org> wrote:
>>
>> On Wed, Oct 22, 2008 at 11:25:17AM +0800, teawater wrote:
>> > I think your not clear my idea.
>> >
>> > > I think maybe some instruction can do it.
>> > > Such as add instruction. When it forward execute, it add some number
>> > > to a value of register. When it reverse, it can sub this number from
>> > > the value of register. It can reverse without record.
>> >
>> > Maybe you can read this part again.
>> >
>> > And what is the status of program? Most of time, it's just the values
>> > of registers and memory. Do not think anything that complex.
>>
>> Jakob is right.  For instance, if the add instruction sets an overflow
>> flag in the status register, you can not figure out what the previous
>> version of the overflow flag was after the instruction.
>>
>> --
>> Daniel Jacobowitz
>> CodeSourcery
>


  reply	other threads:[~2008-10-22 16:43 UTC|newest]

Thread overview: 18+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2008-10-20  1:14 Michael Snyder
2008-10-20  8:11 ` Frederic Riss
2008-10-20 16:08 ` teawater
2008-10-21  7:29   ` Jakob Engblom
2008-10-22  3:26     ` teawater
2008-10-22 13:37       ` Daniel Jacobowitz
2008-10-22 16:19         ` teawater
2008-10-22 16:43           ` teawater [this message]
2008-10-22 16:48             ` teawater
2008-10-22 17:09             ` Dave Korn
2008-10-22 17:19               ` teawater
2008-10-22 18:14             ` Michael Snyder
2008-10-22 19:38               ` Jakob Engblom
2008-10-23  3:46                 ` teawater
2008-10-23  8:35                   ` Jeremy Bennett
2008-10-23 10:43                   ` Jakob Engblom
2008-10-23  3:39               ` teawater
2008-10-21  7:27 ` Jakob Engblom

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