From: Pedro Alves <palves@redhat.com>
To: Simon Marchi <simon.marchi@ericsson.com>, gdb@sourceware.org
Cc: Yao Qi <qiyaoltc@gmail.com>
Subject: Re: Debugging return.exp on ARM
Date: Thu, 26 May 2016 19:11:00 -0000 [thread overview]
Message-ID: <a8700f42-7139-bf7e-7ad9-48a7e47d5863@redhat.com> (raw)
In-Reply-To: <574712FC.5090409@ericsson.com>
On 05/26/2016 04:15 PM, Simon Marchi wrote:
> Given that we give the right input to the kernel, even in the cases that
> fail, I assume that the problem must be something like wrong cache invalidation
> or memory barrier/sequencing.
>
> I ran this test in a loop and got these results:
>
> ODroid XU-4:
> 263 fails
> 737 successes
>
> Firefly RK3288:
> 336 fails
> 163 success
>
> First, is anybody able to reproduce the problem on other boards? Then, does anybody
> have an idea what could cause this?
- I'd suspect something odd with caches / barriers too.
Did you try sprinkling in memory barrier instructions, and
see whether it makes a difference?
- I'd also try "si" + "info regs" instead of "next" after the return,
and see if a register with a bad value pops up always at some
specific instruction.
- I'd try to see if pinning the thread to a core makes a difference.
- Might help to show the kernel version.
Thanks,
Pedro Alves
next prev parent reply other threads:[~2016-05-26 19:11 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2016-05-26 15:15 Simon Marchi
2016-05-26 19:11 ` Pedro Alves [this message]
2016-05-27 13:35 ` Simon Marchi
2016-06-01 15:17 ` Yao Qi
2016-06-01 15:22 ` Simon Marchi
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