From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from simark.ca by simark.ca with LMTP id AFJaIUWyMGAVBAAAWB0awg (envelope-from ) for ; Sat, 20 Feb 2021 01:55:01 -0500 Received: by simark.ca (Postfix, from userid 112) id 793191EF78; Sat, 20 Feb 2021 01:55:01 -0500 (EST) X-Spam-Checker-Version: SpamAssassin 3.4.2 (2018-09-13) on simark.ca X-Spam-Level: X-Spam-Status: No, score=-1.1 required=5.0 tests=DKIM_SIGNED,DKIM_VALID, DKIM_VALID_AU,MAILING_LIST_MULTI,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.2 Received: from sourceware.org (server2.sourceware.org [8.43.85.97]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by simark.ca (Postfix) with ESMTPS id 9F4C81EE39 for ; Sat, 20 Feb 2021 01:55:00 -0500 (EST) Received: from server2.sourceware.org (localhost [IPv6:::1]) by sourceware.org (Postfix) with ESMTP id C5D0D3858034; Sat, 20 Feb 2021 06:54:59 +0000 (GMT) DKIM-Filter: OpenDKIM Filter v2.11.0 sourceware.org C5D0D3858034 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sourceware.org; s=default; t=1613804099; bh=RRx29miDRUo5gbEDB8EzI6z3iLxfkh1Ju668eS9DzuU=; h=Date:To:Subject:References:In-Reply-To:List-Id:List-Unsubscribe: List-Archive:List-Post:List-Help:List-Subscribe:From:Reply-To:Cc: From; b=PXbN2Tt4O0yu9IbfTbNzv9e5QqAe+Dh8mFJKLCFwyhOOETHLEl0gP+pTUJ8fdmMcX T4l+0gRQewoO8mAJVnkgD5MGTXwtERZG4TRqV4ez6SIDgQ42RZAZuAAbWMCK5HYMgN MeuPCV7a4gqHlzGOTTV6b//JZBhMBRLbxTNbTDMU= Received: from smtp.gentoo.org (mail.gentoo.org [IPv6:2001:470:ea4a:1:5054:ff:fec7:86e4]) by sourceware.org (Postfix) with ESMTP id A67DD3858034 for ; Sat, 20 Feb 2021 06:54:56 +0000 (GMT) DMARC-Filter: OpenDMARC Filter v1.3.2 sourceware.org A67DD3858034 Received: from vapier (localhost [127.0.0.1]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by smtp.gentoo.org (Postfix) with ESMTPS id 702E8340FC2; Sat, 20 Feb 2021 06:54:55 +0000 (UTC) Date: Sat, 20 Feb 2021 01:54:54 -0500 To: Howard Chu Subject: Re: Is it possible to remote debug a multicore system of which each core has different instruction set arch? Message-ID: Mail-Followup-To: Howard Chu , mx , gdb References: MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: X-BeenThere: gdb@sourceware.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Gdb mailing list List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , From: Mike Frysinger via Gdb Reply-To: Mike Frysinger Cc: gdb , mx Errors-To: gdb-bounces@sourceware.org Sender: "Gdb" On 20 Feb 2021 02:46, Howard Chu wrote: > mx via Gdb wrote: > > Is it possible to remote debug a multicore system of which each core has different instruction set arch? For example if I have a two core chip, one core is cortex-m3, the other is riscv-i32. Or if I can debug multiple chip at the same time, each of which is different arch? I think this feature is important, since in the future there will be more debug situations like this. > > If such a heterogeneous hardware system exists, the different cores will necessarily be running different > OS images. So treat it as debugging two physically separate machines, nothing different from today. fwiw, this situation isn't theoretical. TI makes an ARM + C6X SoC combo where both run Linux. https://en.wikipedia.org/wiki/Texas_Instruments_DaVinci -mike