From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 9140 invoked by alias); 10 Oct 2016 15:39:42 -0000 Mailing-List: contact gdb-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sourceware.org Received: (qmail 9130 invoked by uid 89); 10 Oct 2016 15:39:41 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=0.8 required=5.0 tests=AWL,BAYES_50,RCVD_IN_DNSWL_LOW,RCVD_IN_SORBS_SPAM autolearn=ham version=3.3.2 spammy=connects, timsifivecom, Newsome, U*tim X-HELO: mail-it0-f43.google.com Received: from mail-it0-f43.google.com (HELO mail-it0-f43.google.com) (209.85.214.43) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 10 Oct 2016 15:39:31 +0000 Received: by mail-it0-f43.google.com with SMTP id e203so16816418itc.0 for ; Mon, 10 Oct 2016 08:39:31 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:mime-version:in-reply-to:references:from:date :message-id:subject:to:cc:content-transfer-encoding; bh=34KBzPpl5Tp8YRfdQo0AMm9fhu3XOl4hGFW+IntFclc=; b=aJn3jmCLla5Z1XdxN35Oijgcsf5zjAlA6q7ilabNnLf94gC5R8smJtiNJ2EQlVxl0q 1BmrF+F/iTnsUwrp3ZWOtUUrBFh+Sk29O+Co3HEKs+/y54Fhiwy378geFIBp/yiRUsek Lf3rqkGPzdouXSSrd4Wl8ducWDYBHa6tEwZxpBJ/aFEgDJCVsPaGZhr8YRCg1qlTNJn1 esjEWRU4AivWTe2+9JElGrdsth6jLdAuF3gkAxgQGVayrj5LFDJDQ7ZgiZrRqOgPyTMs 5bZ3eRN55cGeG6YBADwcfzCmu/roAWW8Wr4jV+9aCVqSzR8ZtIPka4Gs8o39HYdQqvJV 3EJw== X-Gm-Message-State: AA6/9RksR8RksIV9c2gTYdn7KcVmKxWqZT+Q2mJSsTm56ntG7H5u0yVGu64a3CGGQgYYVi4V1Sc0ozkwGIJyvA== X-Received: by 10.36.107.82 with SMTP id v79mr12199781itc.52.1476113969868; Mon, 10 Oct 2016 08:39:29 -0700 (PDT) MIME-Version: 1.0 Received: by 10.107.17.41 with HTTP; Mon, 10 Oct 2016 08:39:29 -0700 (PDT) In-Reply-To: References: From: Tim Newsome Date: Mon, 10 Oct 2016 15:39:00 -0000 Message-ID: Subject: Re: can target code change architecture setting? To: Yao Qi Cc: gdb Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: quoted-printable X-IsSubscribed: yes X-SW-Source: 2016-10/txt/msg00017.txt.bz2 That sounds like a good solution. I'll see if I can make it happen. Thanks, Yao! Tim On Mon, Oct 10, 2016 at 2:26 AM, Yao Qi wrote: > On Fri, Oct 7, 2016 at 6:38 PM, Tim Newsome wrote: >> I=E2=80=99m working with riscv gdb support. One problem people occasiona= lly >> run into is that riscv has both 32- and 64-bit variants. The current >> gdb code just assumes 64-bit by default (unless a file is specified, >> and then it gets the info from the ELF info). If such a gdb connects >> to a 32-bit target, bulk register reads end up wonky, and writes send >> too much data which confuses OpenOCD. Currently the user needs to do >> something like set arch riscv:rv32 to work around this. >> >> Is it possible for riscv-tdep.c to have some kind of callback function >> that is called when gdb connects to a server, and for that function to >> change the register width? If so, gdb could read the riscv misa >> (instruction set architecture information) register and transparently >> reconfigure. >> >> I looked, but I didn=E2=80=99t see any obvious callbacks that get called= when >> connecting to a target. >> > > I don't know much about riscv, so I assume 32-bit variant and 64-bit > variant can _not_ co-exist in one program. If so, each variant can > be abstracted as a gdbarch. > > You need to add two target descriptions for 32-bit and 64-bit variants > respectively, and OpenOCD need to send back the right target > description to GDB. I assume riscv 32-bit and 64-bit variants have > different registers. > > In GDB side, you need two gdbarch instances, 32-bit riscv and 64-bit > riscv. In riscv_gdbarch_init, look for the feature from the target > description (sent by OpenOCD for example), if 32-bit is found, create > and return gdbarch for 32-bit; if 64-bit is found, create and return > gdbarch for 64-bit. > > If 32-bit variant and 64-bit one is quite different, you even can create > two tdep.c files, like riscv32-tdep.c and risc64-tdep.c. > > -- > Yao (=E9=BD=90=E5=B0=A7)