From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 80057 invoked by alias); 6 May 2019 20:52:06 -0000 Mailing-List: contact gdb-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sourceware.org Received: (qmail 80047 invoked by uid 89); 6 May 2019 20:52:06 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-4.4 required=5.0 tests=AWL,BAYES_50,SPF_PASS autolearn=ham version=3.3.1 spammy=H*r:sk:server-, coherent, feedback!, flushes X-HELO: mx2.freebsd.org Received: from mx2.freebsd.org (HELO mx2.freebsd.org) (8.8.178.116) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Mon, 06 May 2019 20:52:05 +0000 Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)) (Client CN "mx1.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx2.freebsd.org (Postfix) with ESMTPS id 131D83EF9; Mon, 6 May 2019 20:52:02 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from smtp.freebsd.org (smtp.freebsd.org [96.47.72.83]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "smtp.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 5560789A51; Mon, 6 May 2019 20:52:01 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from John-Baldwins-MacBook-Pro-3.local (ralph.baldwin.cx [66.234.199.215]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (Client did not present a certificate) (Authenticated sender: jhb) by smtp.freebsd.org (Postfix) with ESMTPSA id DA853173DD; Mon, 6 May 2019 20:52:00 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Subject: Re: icache-dcache coherence on ARM To: Xiaozhu Meng , gdb@sourceware.org References: From: John Baldwin Openpgp: preference=signencrypt Message-ID: <5954fa76-7b6a-1544-6516-5d11cb395b26@FreeBSD.org> Date: Mon, 06 May 2019 20:52:00 -0000 User-Agent: Mozilla/5.0 (Macintosh; Intel Mac OS X 10.12; rv:60.0) Gecko/20100101 Thunderbird/60.6.1 MIME-Version: 1.0 In-Reply-To: Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 7bit X-Rspamd-Queue-Id: 5560789A51 X-Spamd-Bar: -- Authentication-Results: mx1.freebsd.org X-Spamd-Result: default: False [-2.98 / 15.00]; local_wl_from(0.00)[FreeBSD.org]; NEURAL_HAM_MEDIUM(-1.00)[-0.999,0]; NEURAL_HAM_SHORT(-0.98)[-0.981,0]; ASN(0.00)[asn:11403, ipnet:96.47.64.0/20, country:US]; NEURAL_HAM_LONG(-1.00)[-1.000,0] X-IsSubscribed: yes X-SW-Source: 2019-05/txt/msg00012.txt.bz2 On 5/6/19 12:30 PM, Xiaozhu Meng wrote: > Hi, > > I am reading gdb's source code to hopefully get answers for a question that > I have in my other project. > > On ARM, the architecture does not guarantee that icache and dcache are > coherent. When GDB writes a software breakpoint into the inferior's address > space, is it possible that the inferior executes outdated code in icache > and thus miss the software breakpoint? > > I try to search around the gdb code base to understand whether GDB flushes > icache or not, but could not find answers. > > I appreciate any feedback! I suspect that the cache flushing is done by the host OS kernel in response to the write. This is what happens on FreeBSD at least where any executable page in a process written to via ptrace(PT_IO) has its i-cache flushed by this code in sys/kern/sys_process.c in proc_rwmem(): /* * Now do the i/o move. */ error = uiomove_fromphys(&m, page_offset, len, uio); /* Make the I-cache coherent for breakpoints. */ if (writing && error == 0) { vm_map_lock_read(map); if (vm_map_check_protection(map, pageno, pageno + PAGE_SIZE, VM_PROT_EXECUTE)) vm_sync_icache(map, uva, len); vm_map_unlock_read(map); } -- John Baldwin