From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 20989 invoked by alias); 24 Jul 2002 15:35:47 -0000 Mailing-List: contact gdb-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sources.redhat.com Received: (qmail 20982 invoked from network); 24 Jul 2002 15:35:46 -0000 Received: from unknown (HELO localhost.redhat.com) (216.138.202.10) by sources.redhat.com with SMTP; 24 Jul 2002 15:35:46 -0000 Received: from ges.redhat.com (localhost [127.0.0.1]) by localhost.redhat.com (Postfix) with ESMTP id 1E8623D66; Wed, 24 Jul 2002 11:35:46 -0400 (EDT) Message-ID: <3D3EC951.1060302@ges.redhat.com> Date: Wed, 24 Jul 2002 08:35:00 -0000 From: Andrew Cagney User-Agent: Mozilla/5.0 (X11; U; NetBSD macppc; en-US; rv:1.0.0) Gecko/20020708 X-Accept-Language: en-us, en MIME-Version: 1.0 To: Jim Blandy Cc: gdb@sources.redhat.com Subject: Re: WIP: Register doco References: <3D38AF69.7020902@ges.redhat.com> <3D39954D.1020306@ges.redhat.com> <3D39CAD1.3060106@ges.redhat.com> <3D3AE41B.10201@ges.redhat.com> <3D3DF608.8010403@ges.redhat.com> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2002-07/txt/msg00246.txt.bz2 > If this section needs an example then (given MarkK's observation about >> the i387) then either d10v's two stack pointers or the SH's bank >> registers. Neither of these are especially complicated. > > > But... but the IA-32's FP and MMX hair is, like, the canonical > motivation for the cooked/raw distinction. You've said repeatedly > that a GDB developer needs to understand this distinction. That makes > it a *good* example, right? I think it's one of the best --- > especially since it's something familiar to a lot more people than the > d10v and the SH. The original motivation for this model was work by David Taylor for an architecture that dual ported all of memory (memory == register). Additional motivations came from SH4 (sh5 proved the model), d10v and MIPS. The i386 was but a blip on the horizon. Given we're struggling amonst ourselves with the IA-32 I think that suggests it is a very poor choice for an example. Especially given there are better cleaner examples to be had using other familar architectures. I would assume this is why people like H&P chose DLX when describing CPU architectures. enjoy, Andrew