From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 32343 invoked by alias); 10 May 2002 14:33:22 -0000 Mailing-List: contact gdb-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sources.redhat.com Received: (qmail 32296 invoked from network); 10 May 2002 14:33:21 -0000 Received: from unknown (HELO localhost.redhat.com) (24.112.240.27) by sources.redhat.com with SMTP; 10 May 2002 14:33:21 -0000 Received: from cygnus.com (localhost [127.0.0.1]) by localhost.redhat.com (Postfix) with ESMTP id 747D83DCA; Fri, 10 May 2002 10:33:28 -0400 (EDT) Message-ID: <3CDBDA38.3080108@cygnus.com> Date: Fri, 10 May 2002 07:33:00 -0000 From: Andrew Cagney User-Agent: Mozilla/5.0 (X11; U; NetBSD macppc; en-US; rv:1.0rc1) Gecko/20020429 X-Accept-Language: en-us, en MIME-Version: 1.0 To: Joern Rennecke Cc: ezannoni@redhat.com, binutils@sources.redhat.com, aoliva@redhat.com, gcc@gcc.gnu.org, gdb@sources.redhat.com, bje@redhat.com Subject: Re: SH5 compact register numbering in gcc -> gdb interface - include/elf/sh.h ? References: <3CCED903.294513BE@st.com> <15568.36275.110744.510692@localhost.redhat.com> <3CD12BF8.7E1650C1@st.com> <3CD7EB51.7816DD1@st.com> <3CD803BC.5060900@cygnus.com> <3CD823D1.FC1E3717@st.com> <3CD85192.7020100@cygnus.com> <3CDAEDA4.3DE4A2D5@st.com> <15578.63785.429521.553723@localhost.redhat.com> <3CDB9C75.27044AE@st.com> Content-Type: text/plain; charset=us-ascii; format=flowed Content-Transfer-Encoding: 7bit X-SW-Source: 2002-05/txt/msg00102.txt.bz2 > + enum >> > + { >> > + SH_DEBUG_INFO_R0 = 0, >> > + SH_DEBUG_INFO_PR = 17, >> > + SH_DEBUG_INFO_GBR = 18, >> > + SH_DEBUG_INFO_MACH_BIG = 20, SH_DEBUG_INFO_MACL, SH_DEBUG_INFO_MACH_LITTLE, >> >> This will break gdb. Register 22 ir SR. What are these registers? > > > gcc does not emit debug information for SR - if it was encountered in > DBX_REGISTER_NUMBER, the compiler would abort. So we don't actually have a > number > allocated in the interface right now, and if we need one, we are free to choose > any. > > >> Doesn't SH have only mach and macl? > > > Yes, it has only mach and macl. But you could hold a 64 bit value in this > register > pair, in which case MACH always holds the high part and MACL holds the low part. > So the idea is to use SH_DEBUG_INFO_MACH_BIG for big endian, and > SH_DEBUG_INFO_MACH_LITTLE for little endian. This way, it is clear where low > and high > part are. both SH_DEBUG_INFO_MACH_BIG and SH_DEBUG_INFO_MACH_LITTLE are then > mapped > to gdb's MACH. Note that SH_DEBUG_INFO_MACH_BIG is the old MACH number, and > SH_DEBUG_INFO_MACL is the old MACL number, so we have full backwards > compatibility. > Having both this backwards compatibility and the ability to represent a 64 bit > value > in MACH/MACL for little endian was the point of using 22 for > SH_DEBUG_INFO_MACH_LITTLE. The correct way to represent a 64 bit value in MACH and MACL is to emit a location expression indicating that the value is split across the MACL/MACH registers. GDB currently only handles the simple case of this (but hey that is just a bug). If GCC can't emit this info correctly in all cases then I guess GCC also has a bug and that bug also needs to be fixed. enjoy, Andrew