From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 7684 invoked by alias); 30 Apr 2002 17:48:21 -0000 Mailing-List: contact gdb-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sources.redhat.com Received: (qmail 7652 invoked from network); 30 Apr 2002 17:48:19 -0000 Received: from unknown (HELO beta.dmz-eu.st.com) (164.129.1.35) by sources.redhat.com with SMTP; 30 Apr 2002 17:48:19 -0000 Received: from zeta.dmz-eu.st.com (zeta.dmz-eu.st.com [164.129.230.9]) by beta.dmz-eu.st.com (STMicroelectronics) with SMTP id D15014F8A; Tue, 30 Apr 2002 17:48:07 +0000 (GMT) Received: by zeta.dmz-eu.st.com (STMicroelectronics, from userid 0) id 247A06125; Tue, 30 Apr 2002 17:48:07 +0000 (GMT) Received: from thistle.bri.st.com (localhost [127.0.0.1]) by zeta.dmz-eu.st.com (STMicroelectronics) with ESMTP id EE7A51845; Tue, 30 Apr 2002 17:48:05 +0000 (GMT) Received: from [164.129.8.14] (helo=masterwort) by thistle.bristol.st.com with esmtp (Exim 3.03 #5) id 172bjQ-0003hz-00; Tue, 30 Apr 2002 18:48:04 +0100 Received: from [164.129.14.84] (helo=st.com) by masterwort with asmtp (Exim 3.22 #1) id 172bjQ-0004Gi-00; Tue, 30 Apr 2002 18:48:04 +0100 Message-ID: <3CCED903.294513BE@st.com> Date: Tue, 30 Apr 2002 10:48:00 -0000 From: Joern Rennecke Reply-To: joern.rennecke@st.com Organization: SuperH UK Ltd. X-Accept-Language: en MIME-Version: 1.0 To: gcc@gcc.gnu.org, gdb@sources.redhat.com, aoliva@redhat.com, ezannoni@redhat.com, bje@redhat.com Cc: ac131313@cygnus.com Subject: SH5 compact register numbering in gcc -> gdb interface Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-SW-Source: 2002-04/txt/msg00508.txt.bz2 The numbers currently used to encode registers in the debug information for SH5compact seem quite arbitrary. I see that they correspond to the current pseudo register scheme in gdb, but this is going to change when a unified interface for SH and SH64 is created. What I have in mind for the simulator interface is to keep the current SH1-SH4, SH[3]-DSP register numbers, (and also keep the corresponding gdb pseudo register numbers), and start the SH64 numbers at 128. The SHcompact simulator register numbers can be the same as for SH4. However, this exposes the arbitrariness of the gcc->gdb interface, and I think now - before the integration of the simulator and gdb port into the FSF sources - is our last chance to change it. The SHcompact registers are all mapped to SH5media registers, and therefore it seems most natural to use the numbers used for these SH5media registers also in SHcompact code - indeed, this is currently already done for the general purpose registers. The only odd one out is MACH, which resides in the upper 32 bit of R17; for this I propose to use number 141. This numbering also has the advantage that all SH5compact registers except MACH can be encoded with LEB128 in a single byte. compact reg current # sh5 equiv proposed # -----------+-----------+------------+------------------ R0 .. R15 0 .. 15 R0 .. R15 0 .. 15 FR0 .. FR15 245 .. 260 FR0 .. FR15 77 .. 92 XD0 .. XD14 289 .. 296 DR16 .. DR30 93 .. 107 (odd only) PR 241 R18 18 T 242 R19 19 GBR 238 R16 16 MACH 239 R17(high) 141 MACL 240 R17(low) 17 FPUL 244 FR32 109 -- -------------------------- SuperH 2430 Aztec West / Almondsbury / BRISTOL / BS32 4AQ T:+44 1454 462330