From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 16865 invoked by alias); 17 Feb 2004 05:12:05 -0000 Mailing-List: contact gdb-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sources.redhat.com Received: (qmail 16842 invoked from network); 17 Feb 2004 05:12:00 -0000 Received: from unknown (HELO mail.pune.nevisnetworks.com) (203.124.166.179) by sources.redhat.com with SMTP; 17 Feb 2004 05:12:00 -0000 Received: from nevis_pune_xchg.pune.nevisnetworks.com (nevis_pune_xchg.pune.nevisnetworks.com [192.168.2.7]) by mail.pune.nevisnetworks.com (8.12.5/8.12.5) with ESMTP id i1H5Hj9G009220 for ; Tue, 17 Feb 2004 10:47:47 +0530 content-class: urn:content-classes:message MIME-Version: 1.0 Subject: RE: hardware support for gdb? Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: quoted-printable Date: Tue, 17 Feb 2004 05:12:00 -0000 Message-ID: <36993D449C7FA647BF43568E0793AB3E4C85F6@nevis_pune_xchg.pune.nevisnetworks.com> X-MS-Has-Attach: X-MS-TNEF-Correlator: From: "Atul Talesara" To: "mohanlal jangir" Cc: X-SW-Source: 2004-02/txt/msg00187.txt.bz2 Please see inline ... > -----Original Message----- > From: gdb-owner@sources.redhat.com [mailto:gdb-owner@sources.redhat.com] > On Behalf Of mohanlal jangir > Sent: Tuesday, February 17, 2004 10:16 AM > To: Andrew Cagney > Cc: gdb@sources.redhat.com > Subject: Re: hardware support for gdb? >=20 > > > > > > Really!! Does even single stepping also not require any hardware > support? > > > > I'm not sure what you mean by hardware support. The instruction set > > architecture needs to provide a breakpoint instruction. A single-step > > mechanism is useful but not an absolute requirement - GDB can use > > software singlestep (although I suspect that code has bitrotten). > > > > Andrew > > >=20 > Thanks Andrew for your prompt replies. I was reading an article on "how > gdb > works". This is a paragraph from that: >=20 > The Remote Serial Protocol's step command is a bit more challenging, > especially when the target processor doesn't provide a "trace bit" or > similar functionality (For example, Motorola 683xx processors contain the > ability to trap on instruction execution and/or changes in program flow; > this feature is controlled by the "trace enable" bits, T1 and T0, in the > processor's status register). In these cases, the only alternative is for > the stub to disassemble the instruction about to be executed so that it > can > determine where the program is going to go next. >=20 > What I understood from this paragraph is that, if a target processor > provide > "trace bit" kind of functionality, gdb developer's life is easier > otherwise > he has to do some more work(disassembling of instruction). Am I right? You are right :-) > Could > you please explain a little about "trace bit" or similar functionality?=20 [Atul Talesara] Trace bit is a special bit in one of the control registers of the processor which instructs processor to generate a "debug exception" after executing every instruction, thus transferring control to the debug exception handler (debugger/stub, in our case); essentially allowing to single step through the code. Now, when this functionality is not available in the processor, debugger has to put a BREAK instruction AFTER the current instruction, so that after execution of that instruction processor generates an exception, transferring control to debugger/stub, thus emulating a single step. Debugger now replaces this BREAK with the original instruction and puts a BREAK again AFTER this instruction. And keeps doing this until user wants to "single-step". Now, because of the branch instructions, guessing the next instruction becomes a non-trivial issue (requiring you to disassemble instructions to get the destination addresses), and also complicates the process of restoring original instructions. This is what is called as single step in software. If you are curious to look at the code that does this, then skim through: /linux-2.4/arch/mips/kernel/gdb-stub.c Hope this answers your question. > Is > it the breakpoint instruction, you mentioned about? >=20 > Regards > Mohanlal Thanks and Regards, Atul P Talesara ------------------------------------------------------------------ The Self as a different entity, an object, is what people are trying to see. That is an illusion. -Sri Sri ------------------------------------------------------------------