From mboxrd@z Thu Jan  1 00:00:00 1970
From: "Eli Zaretskii" <eliz@is.elta.co.il>
To: ac131313@cygnus.com
Cc: gdb@sources.redhat.com
Subject: Re: nm.h, *-nat.c and multi-arch?
Date: Wed, 04 Jul 2001 11:54:00 -0000
Message-id: <2561-Wed04Jul2001215136+0300-eliz@is.elta.co.il>
References: <3B43404E.6090805@cygnus.com> <7263-Wed04Jul2001202553+0300-eliz@is.elta.co.il> <3B4361F7.7040302@cygnus.com>
X-SW-Source: 2001-07/msg00030.html

> Date: Wed, 04 Jul 2001 14:35:35 -0400
> From: Andrew Cagney <ac131313@cygnus.com>
> 
> For instance, a hardware breakpoint mechanism implemented purely as 
> register reads/writes shouldn't need to do anything like access ptrace() 
> directly.  Instead it should just access the target layer below it which 
> (hopefully) is making available all the registers it needs.

Now I'm confused ;-) How can you access the debug registers except via
ptrace, procfs, etc.?  Even DJGPP needs a bunch of system calls to do
that, since the debug registers are not directly accessible to DPMI
applications.

The last episode of the x86 watchpoint support was an attempt to
generalize the magic system calls used on various platforms to access
debug registers.  But direct access to these registers is probably
possible only on embedded targets, where there's no OS to get in the
way.