From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 42622 invoked by alias); 21 Oct 2015 08:16:15 -0000 Mailing-List: contact gdb-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sourceware.org Received: (qmail 42606 invoked by uid 89); 21 Oct 2015 08:16:14 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-2.0 required=5.0 tests=AWL,BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS autolearn=ham version=3.3.2 X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with (AES256-GCM-SHA384 encrypted) ESMTPS; Wed, 21 Oct 2015 08:16:13 +0000 Received: from int-mx11.intmail.prod.int.phx2.redhat.com (int-mx11.intmail.prod.int.phx2.redhat.com [10.5.11.24]) by mx1.redhat.com (Postfix) with ESMTPS id 94280C0C18B1; Wed, 21 Oct 2015 08:16:12 +0000 (UTC) Received: from blade.nx (ovpn-116-101.ams2.redhat.com [10.36.116.101]) by int-mx11.intmail.prod.int.phx2.redhat.com (8.14.4/8.14.4) with ESMTP id t9L8GBxF021611; Wed, 21 Oct 2015 04:16:12 -0400 Received: by blade.nx (Postfix, from userid 1000) id C2A1126454C; Wed, 21 Oct 2015 09:16:10 +0100 (BST) Date: Wed, 21 Oct 2015 08:16:00 -0000 From: Gary Benson To: "H.J. Lu" Cc: Richard Henderson , GDB Subject: Re: Changes required for x86 address spaces Message-ID: <20151021081610.GA13381@blade.nx> References: <5626BF4A.2080600@redhat.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: X-IsSubscribed: yes X-SW-Source: 2015-10/txt/msg00087.txt.bz2 H.J. Lu wrote: > On Tue, Oct 20, 2015 at 3:25 PM, Richard Henderson wrote: > > Here are some notes regarding gdb changes required in order to support > > > > https://gcc.gnu.org/ml/gcc-patches/2015-10/msg01972.html > > > > In my opinion, DW_AT_address_class is best when the alternate > > address space is truely disjoint, or has a different pointer > > width. That certainly matches up with the language in the dwarf4 > > doc, and existing usage in the embedded targets. > > > > Thus I've arranged for these x86 address spaces to use > > DW_AT_segment, a dwarf location containing an offset from the flat > > address space. For the purposes of the debug info, I map > > __seg_tls to __seg_fs or __seg_gs. > > > > The x86-64 abi already has dwarf register numbers allocated for > > fs_base and gs_base. Thus the location is simply the trivial > > DW_OP_regx 58 or 59 respectively. The i386 abi does not yet have > > the same register number pre-allocated; the latest version I see > > in HJL's github document has dwarf registers 58-59 within a block > > of reserved values, so for now I'm using the same values for both > > x86-64 and i386. > > Table 2.14: DWARF Register Number Mapping in Intel386 psABI: > > https://github.com/hjl-tools/x86-psABI/wiki/X86-psABI > > defines > > Segment Register ES 40 %es > Segment Register CS 41 %cs > Segment Register SS 42 %ss > Segment Register DS 43 %ds > Segment Register FS 44 %fs > Segment Register GS 45 %gs > > Why not use them? x86 has %fs and %fs_base, and %gs and %gs_base. I don't understand the difference but I do know that when libthread_db asks GDB to look in FS or GS (in ps_get_thread_area) what GDB actually returns is the contents of FS_BASE or GS_BASE. (If GDB could directly access FS_BASE and GS_BASE through regcache or whatever then thread debugging could be done without the ptrace hacks in ps_get_thread_area (so presumably faster) but I don't know how to add this support so I haven't done it.) Cheers, Gary -- http://gbenson.net/