From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 4823 invoked by alias); 6 Feb 2006 23:47:15 -0000 Received: (qmail 4815 invoked by uid 22791); 6 Feb 2006 23:47:15 -0000 X-Spam-Check-By: sourceware.org Received: from nevyn.them.org (HELO nevyn.them.org) (66.93.172.17) by sourceware.org (qpsmtpd/0.31.1) with ESMTP; Mon, 06 Feb 2006 23:47:14 +0000 Received: from drow by nevyn.them.org with local (Exim 4.54) id 1F6G4d-00009Z-Bc; Mon, 06 Feb 2006 18:47:11 -0500 Date: Mon, 06 Feb 2006 23:47:00 -0000 From: Daniel Jacobowitz To: Rishi Dixit Cc: Mailing List Subject: Re: Resume from Breakpoint - Next Instruction Address or Target Address? Message-ID: <20060206234711.GA523@nevyn.them.org> Mail-Followup-To: Rishi Dixit , Mailing List References: <1138623528.3621.173.camel@rishidixit> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1138623528.3621.173.camel@rishidixit> User-Agent: Mutt/1.5.8i X-IsSubscribed: yes Mailing-List: contact gdb-help@sourceware.org; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sourceware.org X-SW-Source: 2006-02/txt/msg00037.txt.bz2 On Mon, Jan 30, 2006 at 05:48:48PM +0530, Rishi Dixit wrote: > Hi, > > > I am studying about breakpoint functionality in GDB. My study is local > to the MIPS Simulator. While studying the GDB source, I was referring > the handling of BREAK instruction. > > This handling checks for the presence of BREAK instruction in a delay > slot and alters the Program Counter. However, this information is > overwritten when the CPU registers are saved before triggering a > Breakpoint exception. > > I suspected this would lead to a loss of information regarding the > target address of jump/branch instruction. To confirm this, I made a > test case and checked the GDB behavior. I don't know - you'd have to ask someone more familiar with the architecture and the simulator - but I think this is a bug in either the simulator or GDB; the architecture does provide enough information to handle this case. See the documentation of the BD bit in the Cause register. > My assumption is that since the breakpoint is hit after the jump/branch > instruction has been executed, the resume should be from the target > address. No, generally we want to resume where we were, not where we're going to. The resume should be back on the jump. I have no idea if GDB implements that. -- Daniel Jacobowitz CodeSourcery