From: Paul Gilliam <pgilliam@us.ibm.com>
To: Ramana Radhakrishnan <ramana.radhakrishnan@codito.com>
Cc: gdb@sources.redhat.com, Daniel Jacobowitz <drow@false.org>,
amit bhor <amit.bhor@codito.com>
Subject: Re: RFC : Handling breakpoints on archs. with imprecise exceptions.
Date: Thu, 24 Mar 2005 21:46:00 -0000 [thread overview]
Message-ID: <200503241341.39948.pgilliam@us.ibm.com> (raw)
In-Reply-To: <424321B8.1080004@codito.com>
IIRC, Unix SysV on an MC88000 did this. The kerenl would field an inprecise
interrupt and 'clean it up' so the the messeyness was not passed on to user
level code.
It's been a while, though, so I might be mis-remembering.
-=# Paul #=-
On Thursday 24 March 2005 12:23, Ramana Radhakrishnan wrote:
> Hi,
>
> > Isn't this usually handled by the kernel?
>
> How could this be handled by the kernel ? The point is that
> one needs to insert 4 instructions in the place of one for a
> software breakpoint and the mechanism mentioned in my
> earlier mail is possibly one of the methods . (The point is
> one cannot ignore the next 3 instructions in the pipeline
> since one of them could be a branch to some location , so a
> simple DECR_PC_AFTER_BREAK would not necessarily work always )
>
> Addr to set breakpoint: someinsn
> b bar
>
>
>
> Having said that, could you point me to any kernel that does
> this ?
>
>
>
> cheers
> Ramana
next prev parent reply other threads:[~2005-03-24 21:46 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-03-24 19:46 Ramana Radhakrishnan
2005-03-24 19:57 ` Paul Gilliam
2005-03-24 20:23 ` Ramana Radhakrishnan
2005-03-24 21:46 ` Paul Gilliam [this message]
2005-03-24 20:37 ` Daniel Jacobowitz
2005-03-24 22:46 ` Ramana Radhakrishnan
2005-03-24 21:30 ` Kevin Buettner
2005-03-24 23:31 Decker, Paul
2005-03-24 23:32 ` Daniel Jacobowitz
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