From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 6565 invoked by alias); 12 Feb 2002 14:28:12 -0000 Mailing-List: contact gdb-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sources.redhat.com Received: (qmail 6506 invoked from network); 12 Feb 2002 14:28:10 -0000 Received: from unknown (HELO fw-cam.cambridge.arm.com) (193.131.176.3) by sources.redhat.com with SMTP; 12 Feb 2002 14:28:10 -0000 Received: by fw-cam.cambridge.arm.com; id OAA03698; Tue, 12 Feb 2002 14:28:08 GMT Received: from unknown(172.16.1.2) by fw-cam.cambridge.arm.com via smap (V5.5) id xma002794; Tue, 12 Feb 02 14:27:30 GMT Received: from cam-mail2.cambridge.arm.com (localhost [127.0.0.1]) by cam-admin0.cambridge.arm.com (8.9.3/8.9.3) with ESMTP id OAA07135; Tue, 12 Feb 2002 14:27:30 GMT Received: from sun18.cambridge.arm.com (sun18.cambridge.arm.com [172.16.2.18]) by cam-mail2.cambridge.arm.com (8.9.3/8.9.3) with ESMTP id OAA02477; Tue, 12 Feb 2002 14:27:29 GMT Message-Id: <200202121427.OAA02477@cam-mail2.cambridge.arm.com> X-Mailer: exmh version 2.0.2 2/24/98 To: Andrew Cagney cc: Richard.Earnshaw@arm.com, gdb@sources.redhat.com Reply-To: Richard.Earnshaw@arm.com Organization: ARM Ltd. X-Telephone: +44 1223 400569 (direct+voicemail), +44 1223 400400 (switchbd) X-Fax: +44 1223 400410 X-Address: ARM Ltd., 110 Fulbourn Road, Cherry Hinton, Cambridge CB1 9NJ. X-Url: http://www.arm.com/ Subject: Re: multi-arch and CALL_DUMMY_BREAKPOINT_OFFSET In-reply-to: Your message of "Sun, 10 Feb 2002 15:09:40 EST." <3C66D384.5080102@cygnus.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Tue, 12 Feb 2002 06:28:00 -0000 From: Richard Earnshaw X-SW-Source: 2002-02/txt/msg00183.txt.bz2 > > I guess I'm going to find several things like this... > > > > Well it appears that in a multi-arch gdb (even at level 1), > > CALL_DUMMY_BREAKPOINT_OFFSET can only be a constant for any particular > > architecture. This is a problem, because on the ARM it is currently a > > function that returns one of two values depending on whether the > > call-dummy stub has to be ARM code or Thumb code. Note that both types of > > code can exist within a single application and it is not always safe to > > assume that every function is interworking safe. > > > Oops :-( People keep finding things I thought would be constant but are > not. Indeed, it appears the arm isn't the only machine like this, though... > > > > Any suggestions? Can I diddle with the gdbarch setting dynamically -- eg > > by calling gdbarch_set_call_dummy_breakpoint_offset() from within > > arm_fix_call_dummy()? It's quite gross, but it might work. > And this is what sparc-tdep.c seems to do... In that case it's because the breakpoint position will change if the result is in a structure, or something like that. > > > Long term it would probably be better to rewrite the call-dummy handling > > to remove the covert variable that is used to communicate between the > > various call-dummy stubs, but I'd rather not do that now. > > > /* CALL_DUMMY is an array of words (REGISTER_SIZE), but each word > is in host byte order. Before calling FIX_CALL_DUMMY, we byteswap it > and remove any extra bytes which might exist because ULONGEST is > bigger than REGISTER_SIZE. > > NOTE: This is pretty wierd, as the call dummy is actually a > sequence of instructions. But CISC machines will have > to pack the instructions into REGISTER_SIZE units (and > so will RISC machines for which INSTRUCTION_SIZE is not > REGISTER_SIZE). > > NOTE: This is pretty stupid. CALL_DUMMY should be in strict > target byte order. */ > > You would not be alone. I was thinking of the ARM part of the call-dummy code, not the whole thing, but yes, that needs re-writing too :^) R.