From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 13298 invoked by alias); 6 Dec 2001 10:03:11 -0000 Mailing-List: contact gdb-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sources.redhat.com Received: (qmail 13198 invoked from network); 6 Dec 2001 10:03:07 -0000 Received: from unknown (HELO fw-cam.cambridge.arm.com) (193.131.176.3) by sources.redhat.com with SMTP; 6 Dec 2001 10:03:07 -0000 Received: by fw-cam.cambridge.arm.com; id KAA22821; Thu, 6 Dec 2001 10:03:05 GMT Received: from unknown(172.16.1.2) by fw-cam.cambridge.arm.com via smap (V5.5) id xma022521; Thu, 6 Dec 01 10:02:40 GMT Received: from cam-mail2.cambridge.arm.com (localhost [127.0.0.1]) by cam-admin0.cambridge.arm.com (8.9.3/8.9.3) with ESMTP id KAA26232; Thu, 6 Dec 2001 10:02:39 GMT Received: from sun18.cambridge.arm.com (sun18.cambridge.arm.com [172.16.2.18]) by cam-mail2.cambridge.arm.com (8.9.3/8.9.3) with ESMTP id KAA02195; Thu, 6 Dec 2001 10:02:38 GMT Message-Id: <200112061002.KAA02195@cam-mail2.cambridge.arm.com> X-Mailer: exmh version 2.0.2 2/24/98 To: Andrew Cagney cc: Richard.Earnshaw@arm.com, twall@oculustech.com, gdb@sources.redhat.com Reply-To: Richard.Earnshaw@arm.com Organization: ARM Ltd. X-Telephone: +44 1223 400569 (direct+voicemail), +44 1223 400400 (switchbd) X-Fax: +44 1223 400410 X-Address: ARM Ltd., 110 Fulbourn Road, Cherry Hinton, Cambridge CB1 9NJ. X-Url: http://www.arm.com/ Subject: Re: packing/unpacking 4-octet longs In-reply-to: Your message of "Wed, 05 Dec 2001 13:42:20 EST." <3C0E6A8C.9040306@cygnus.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Thu, 06 Dec 2001 02:03:00 -0000 From: Richard Earnshaw X-SW-Source: 2001-12/txt/msg00049.txt.bz2 > > > I'm not aware of this affecting the ARM (except in that FPA format doubles > > and long doubles always have the word with the exponent at the lowest > > address, but there's nothing in the IEEE FP specs that says this is > > invalid). In particular, storing a word, or multi-word, at an unaligned > > address does not change the order of bytes in memory, so > > memcpy(unaligned_address, aligned_address, sizeof(some_word)) > > does not require diddling with the internal order (or have I misunderstood > > the problem?) > > That was a useful manual :-) See 5-21 where it explains that a > misaligned 32bit access gets rotated before it is stored :-/ You're talking about the ARM manual I posted? If so, please read it again, more carefully. Rotation is *never* done before a store, only on a load: it's a side effect of the byte-lane steering used for reading bytes; and it's also useful for fetching half-words from memory on those machines, since the effect of the rotation means that a ldr (32-bit load) from a mis-aligned address will always result in the desired bits being placed in bits 0:15 (little-endian mode) or bits 16:31 (big-endian mode) of the target register. Anyway, the issue isn't relevant, since the ARM ABI never makes use of this behaviour for un-aligned (packed) objects, the memcpy rule I described above applies. R.