From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 101589 invoked by alias); 6 Jun 2019 16:45:47 -0000 Mailing-List: contact gdb-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sourceware.org Received: (qmail 101581 invoked by uid 89); 6 Jun 2019 16:45:47 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-24.1 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,SPF_PASS autolearn=ham version=3.3.1 spammy=H*f:sk:1559839, H*i:sk:1559839, amend, vregs X-HELO: foss.arm.com Received: from usa-sjc-mx-foss1.foss.arm.com (HELO foss.arm.com) (217.140.101.70) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Thu, 06 Jun 2019 16:45:45 +0000 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 9B1D9374; Thu, 6 Jun 2019 09:45:44 -0700 (PDT) Received: from e103592.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 446B03F690; Thu, 6 Jun 2019 09:45:43 -0700 (PDT) From: Dave Martin To: linux-arm-kernel@lists.infradead.org Cc: gdb@sourceware.org, =?UTF-8?q?Alex=20Benn=C3=A9e?= , Will Deacon , Julien Grall , Catalin Marinas , Peter Maydell , Zhang Lei Subject: [PATCH 1/2] arm64/sve: Factor out FPSIMD to SVE state conversion Date: Thu, 06 Jun 2019 16:45:00 -0000 Message-Id: <1559839495-22315-2-git-send-email-Dave.Martin@arm.com> In-Reply-To: <1559839495-22315-1-git-send-email-Dave.Martin@arm.com> References: <1559839495-22315-1-git-send-email-Dave.Martin@arm.com> X-SW-Source: 2019-06/txt/msg00006.txt.bz2 Currently we convert from FPSIMD to SVE register state in memory in two places. We are about to amend the way this works, so factor this operation out so that subsequent changes only have to be made in one place. Signed-off-by: Dave Martin --- arch/arm64/kernel/fpsimd.c | 21 ++++++++++++--------- 1 file changed, 12 insertions(+), 9 deletions(-) diff --git a/arch/arm64/kernel/fpsimd.c b/arch/arm64/kernel/fpsimd.c index a38bf74..61ceeb9 100644 --- a/arch/arm64/kernel/fpsimd.c +++ b/arch/arm64/kernel/fpsimd.c @@ -352,6 +352,16 @@ static int __init sve_sysctl_init(void) { return 0; } #define ZREG(sve_state, vq, n) ((char *)(sve_state) + \ (SVE_SIG_ZREG_OFFSET(vq, n) - SVE_SIG_REGS_OFFSET)) +static void __fpsimd_to_sve(void *sst, struct user_fpsimd_state const *fst, + unsigned int vq) +{ + unsigned int i; + + for (i = 0; i < 32; ++i) + memcpy(ZREG(sst, vq, i), &fst->vregs[i], + sizeof(fst->vregs[i])); +} + /* * Transfer the FPSIMD state in task->thread.uw.fpsimd_state to * task->thread.sve_state. @@ -368,15 +378,12 @@ static void fpsimd_to_sve(struct task_struct *task) unsigned int vq; void *sst = task->thread.sve_state; struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; - unsigned int i; if (!system_supports_sve()) return; vq = sve_vq_from_vl(task->thread.sve_vl); - for (i = 0; i < 32; ++i) - memcpy(ZREG(sst, vq, i), &fst->vregs[i], - sizeof(fst->vregs[i])); + __fpsimd_to_sve(sst, fst, vq); } /* @@ -490,7 +497,6 @@ void sve_sync_from_fpsimd_zeropad(struct task_struct *task) unsigned int vq; void *sst = task->thread.sve_state; struct user_fpsimd_state const *fst = &task->thread.uw.fpsimd_state; - unsigned int i; if (!test_tsk_thread_flag(task, TIF_SVE)) return; @@ -498,10 +504,7 @@ void sve_sync_from_fpsimd_zeropad(struct task_struct *task) vq = sve_vq_from_vl(task->thread.sve_vl); memset(sst, 0, SVE_SIG_REGS_SIZE(vq)); - - for (i = 0; i < 32; ++i) - memcpy(ZREG(sst, vq, i), &fst->vregs[i], - sizeof(fst->vregs[i])); + __fpsimd_to_sve(sst, fst, vq); } int sve_set_vector_length(struct task_struct *task, -- 2.1.4