From: Richard Earnshaw <rearnsha@gcc.gnu.org>
To: Shaun Jackman <sjackman@gmail.com>
Cc: gdb@sources.redhat.com
Subject: Re: ARM register pages
Date: Fri, 10 Jun 2005 08:14:00 -0000 [thread overview]
Message-ID: <1118391253.19214.7.camel@pc960.cambridge.arm.com> (raw)
In-Reply-To: <7f45d93905060914144001b82b@mail.gmail.com>
On Thu, 2005-06-09 at 22:14, Shaun Jackman wrote:
> On 6/9/05, Daniel Jacobowitz <drow@false.org> wrote:
> > The easiest solution will be to do this instead:
> > abt: [copy the banked address to lr, which is not useful at this
> > point]
> > 1: b 1b
>
> If it's possible, I'd prefer to accomplish a backtrace without
> altering the target's code. I was hoping that "set $cpsr=0x1f" would
> make $lr_usr visible in $lr to gdb, but the value of $lr displayed by
> "i reg" remains the same. Does gdb cache the value of the register? Is
> there a way to force gdb to reload the value of the register from the
> remote target?
Be careful. If you set the CPSR to user mode in this way, the only way
back out again will be to take another trap, thus destroying any machine
state you might have. That is, reading the user mode registers in this
way will be destructive to your debugging session.
R.
next prev parent reply other threads:[~2005-06-10 8:14 UTC|newest]
Thread overview: 9+ messages / expand[flat|nested] mbox.gz Atom feed top
2005-06-08 22:01 Shaun Jackman
2005-06-08 22:59 ` Daniel Jacobowitz
2005-06-09 16:46 ` Shaun Jackman
2005-06-09 17:04 ` Daniel Jacobowitz
2005-06-09 21:14 ` Shaun Jackman
2005-06-09 21:16 ` Daniel Jacobowitz
2005-06-09 21:16 ` Daniel Jacobowitz
2005-06-10 8:14 ` Richard Earnshaw [this message]
2005-06-10 9:02 Thomas Rauscher
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