From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 8801 invoked by alias); 22 Oct 2008 19:38:56 -0000 Received: (qmail 8618 invoked by uid 22791); 22 Oct 2008 19:38:54 -0000 X-Spam-Check-By: sourceware.org Received: from dns.vtab.com (HELO oden.vtab.com) (62.20.90.195) by sourceware.org (qpsmtpd/0.31) with ESMTP; Wed, 22 Oct 2008 19:37:56 +0000 Received: from oden.vtab.com (oden.vtab.com [127.0.0.1]) by oden.vtab.com (Postfix) with ESMTP id E012626EF2E; Wed, 22 Oct 2008 21:37:52 +0200 (CEST) Received: from polhem (unknown [62.20.90.206]) (using TLSv1 with cipher AES128-SHA (128/128 bits)) (No client certificate requested) by oden.vtab.com (Postfix) with ESMTP id B7D5426EEE8; Wed, 22 Oct 2008 21:37:52 +0200 (CEST) From: "Jakob Engblom" To: "'Michael Snyder'" , "'teawater'" Cc: "'Daniel Jacobowitz'" , References: <48FBDA34.6020104@vmware.com> <007e01c9334e$aad56ff0$00804fd0$@com> <20081022133716.GA10237@caradoc.them.org> <48FF6C46.1020402@vmware.com> In-Reply-To: <48FF6C46.1020402@vmware.com> Subject: RE: [discuss] semantics, "replay debugging" vs. "reverse debugging" Date: Wed, 22 Oct 2008 19:38:00 -0000 Message-ID: <011401c9347d$aa97a0f0$ffc6e2d0$@com> MIME-Version: 1.0 Content-Type: text/plain; charset="iso-8859-1" Content-Transfer-Encoding: quoted-printable X-Mailer: Microsoft Office Outlook 12.0 Content-Language: sv X-IsSubscribed: yes Mailing-List: contact gdb-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-owner@sourceware.org X-SW-Source: 2008-10/txt/msg00092.txt.bz2 > > Sorry I am wrong. > > In ARM, Just adds set cpsr reg. So: > > add r0,r0,#10 > > Can reverse without record too. >=20 > OK, well, I was really speaking in the abstract. > I only meant "it's possible to imagine a target or > architecture in which reverse execution can be done > by some means other than record/replay". >=20 > Didn't necessarily mean that it could be done on any > real, existing architecture. Just to add some more to this: 1. Simics is such a target, as is really any deterministic simulator that is running without any asynchronous (from the perspective of the simulator pro= gram) inputs. Typical cases involve booting a machine, which tends to be non-interactive. Or running a program that has all its input data compiled= into it or read from some place that is already on the target. And you could s= ay that this is a degenerate form of record, since you DO have to "record" the initial state in some way, even if the initial state is something that you = write yourself as a simulator configuration. It is recorded in a form that can be brought back identically. 2. There are some odd-ball ideas in computer architecture close to the thin= king behing transactional memory where you do checkpoint and restore and reexecu= te inside an actual physical CPU core. These might also for limited scopes su= pport reversing without replay.=20 But in general, the only way to get back to an earlier state is to record h= ow to get there, usually from some even earlier point. Alternatively, use a tape-recorder analogy and just have a limited buffer with interesting data.= =20 Best regards, /jakob _______________________________________________________ Jakob Engblom, PhD, Technical Marketing Manager Virtutech Direct: +46 8 690 07 47=20=20=20=20 Drottningholmsv=E4gen 14 Mobile: +46 709 242 646=20=20=20 11243 Stockholm Web: www.virtutech.com=20=20 Sweden ________________________________________________________ =20