Hi! 

First of all: Thank you a lot for having fixed the "swi" instruction! No
more "unknown swi xxx". I have stepped through all the code from my
swi_wrapper and swi_handler and it worked very nice! :-) :-)

I think, I have found the little bug in the arm simulator.

It is only one line in "armsupp.c", function ARMul_FicCPSR:

void
ARMul_FixCPSR (ARMul_State * state, ARMword instr, ARMword rhs)
{
  state->Cpsr = ARMul_GetCPSR (state);
  /* original src */
  /* if (state->Bank != USERBANK) */                             // buggy
  /* end original src */
  /* altered src */
    if (state->Mode != USER32MODE)
  /* end altered src */
    {				/* In user mode, only write flags */
      if (BIT (16))
	SETPSR_C (state->Cpsr, rhs);
      if (BIT (17))
	SETPSR_X (state->Cpsr, rhs);
      if (BIT (18))
	SETPSR_S (state->Cpsr, rhs);
    }
  if (BIT (19))
    SETPSR_F (state->Cpsr, rhs);
  ARMul_CPSRAltered (state);
}

The original version tried to determine the cpu state by the banked 
registers. This works most time, but not if we are in system mode. System and 
user mode have same banked registers. That why 

msr cpsr, r0

worked for all modes but not for system mode.

I don´t know, how to care about the case we are in USER26MODE, it could be 
done with some "defines" I would suppose.

I hope this little fix does not have any side effects!

Regards,

Jens-Christian

-- 
Jens-Christian Lache
www.tu-harburg.de/~sejl1601
lache@tu-harburg.de
Tel.: 01759610756 (Hamburg)