From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 22907 invoked by alias); 17 Jun 2003 05:04:22 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 22875 invoked from network); 17 Jun 2003 05:04:21 -0000 Received: from unknown (HELO mms3.broadcom.com) (63.70.210.38) by sources.redhat.com with SMTP; 17 Jun 2003 05:04:21 -0000 Received: from 63.70.210.1 by mms3.broadcom.com with ESMTP (Broadcom SMTP Relay (MMS v5.5.2)); Mon, 16 Jun 2003 22:04:27 -0700 Received: from mail-sj1-5.sj.broadcom.com (mail-sj1-5.sj.broadcom.com [10.16.128.236]) by mon-irva-11.broadcom.com (8.9.1/8.9.1) with ESMTP id WAA27893; Mon, 16 Jun 2003 22:03:55 -0700 (PDT) Received: from ldt-sj3-010.sj.broadcom.com (ldt-sj3-010 [10.21.64.10]) by mail-sj1-5.sj.broadcom.com (8.12.9/8.12.9/SSF) with ESMTP id h5H54Gov026349; Mon, 16 Jun 2003 22:04:16 -0700 (PDT) Received: (from cgd@localhost) by ldt-sj3-010.sj.broadcom.com ( 8.11.6/8.9.3) id h5H54GZ07023; Mon, 16 Jun 2003 22:04:16 -0700 X-Authentication-Warning: ldt-sj3-010.sj.broadcom.com: cgd set sender to cgd@broadcom.com using -f To: ac131313@redhat.com cc: "Kevin Buettner" , gdb-patches@sources.redhat.com Subject: Re: [WIP/RFC] MIPS registers overhaul References: <1030510002453.ZM3880@localhost.localdomain> <3EBD6131.30209@redhat.com> <1030514220025.ZM10373@localhost.localdomain> <3EC461C1.1080104@redhat.com> <3ECA8EC6.6030405@redhat.com> <3EECAB89.10609@redhat.com> <3EEE2B85.6030207@redhat.com> From: cgd@broadcom.com Date: Tue, 17 Jun 2003 05:04:00 -0000 In-Reply-To: Message-ID: User-Agent: Gnus/5.09 (Gnus v5.9.0) Emacs/21.2 MIME-Version: 1.0 X-WSS-ID: 12F07ED11226881-01-01 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 7bit X-SW-Source: 2003-06/txt/msg00555.txt.bz2 At Mon, 16 Jun 2003 20:43:06 +0000 (UTC), "Andrew Cagney" wrote: > > And then to follow on from that: > > * if 32-bit FPU (32-bit MIPS or 64-bit MIPS with FR == 0), assume you > > have 16 of them, or > > Careful. If the ABI is o32, and FR == 0/..., then there should be > only 16 floating point registers in use. The original MIPS 1, and > r5900 ABIs would both allow use of all 32 32 bit floating point > registers. I don't know that that is correct, at least about the "original MIPS 1" behaviour. I have here a copy of Kane's "MIPS RISC Architecture" which describes the r2k/r3k (and FPA). (Mmm, books > 10 yrs old. 8-) For all of the FP operate instructions: ADD.fmt SUB.fmt MUL.fmt DIV.fmt ABS.fmt MOV.fmt NEG.fmt CVT.S.fmt CVT.D.fmt C.cond.fmt (i.e., all of the operate instructions except CVT.W.fmt), there are words like the following in the instruction description: On the FPA, this operation is valid only for double- or single-precision floating-point formats. This operation is not defined if bit 0 of any register specification is set, as the register numbers specify and even-odd pair of adjacent coprocessor general registers (FGR). There are slightly variations in wording in the first sentence (extra words for the CVT.[SD].fmt ops), and for the CVT.[SD].fmt ops single fixed-point format is allowed and the type of the op isn't allowed (i.e., no double for CVT.D.fmt). Note that CVT.W.fmt uses the wording for the second sentence: For double-precision format, this operation is not defined [rest of sentence as above]. Note that the Kane/Heinrich version that includes the r6k and r4k makes a complete mess of the issue, using different wording that *does not* AFAIK agree with the above. Of course, it omits a bunch of things and gets a bunch of things wrong, so more lossage isn't surprising to me. 8-) cgd -- Chris Demetriou Broadcom Corporation Principal Design Engineer Broadband Processor Business Unit Any opinions expressed in this message are mine, not necessarily Broadcom's.