From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 3227 invoked by alias); 28 Feb 2002 07:01:27 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 3073 invoked from network); 28 Feb 2002 07:01:17 -0000 Received: from unknown (HELO mms2.broadcom.com) (63.70.210.59) by sources.redhat.com with SMTP; 28 Feb 2002 07:01:17 -0000 Received: from 63.70.210.1 by mms2.broadcom.com with ESMTP (Broadcom MMS-2 SMTP Relay (MMS v4.7)); Wed, 27 Feb 2002 22:59:58 -0800 X-Server-Uuid: 2a12fa22-b688-11d4-a6a1-00508bfc9626 Received: from dt-sj3-118.sj.broadcom.com (dt-sj3-118 [10.21.64.118]) by mail-sj1-5.sj.broadcom.com (8.12.2/8.12.2) with ESMTP id g1S71H1S013220 for ; Wed, 27 Feb 2002 23:01:17 -0800 ( PST) Received: (from cgd@localhost) by dt-sj3-118.sj.broadcom.com ( 8.9.1/SJ8.9.1) id XAA29613; Wed, 27 Feb 2002 23:01:16 -0800 (PST) To: gdb-patches@sources.redhat.com Subject: [applied patch] tweak MIPS sim pref/prefx instructions. From: cgd@broadcom.com Date: Wed, 27 Feb 2002 23:01:00 -0000 Message-ID: X-Mailer: Gnus v5.7/Emacs 20.4 MIME-Version: 1.0 X-WSS-ID: 10630AE4879681-01-01 Content-Type: text/plain Content-Transfer-Encoding: 7bit X-SW-Source: 2002-02/txt/msg00733.txt.bz2 the intent is obvious. verified that mips64-elf sim still compiles. chris =================================================================== 2002-02-27 Chris Demetriou * mips.igen (PREFX): Tweak instruction opcode fields (i.e., add a comma) so that it more closely match the MIPS ISA documentation opcode partitioning. (PREF): Put useful names on opcode fields, and include instruction-printing string. Index: mips.igen =================================================================== RCS file: /cvs/src/src/sim/mips/mips.igen,v retrieving revision 1.15 diff -u -r1.15 mips.igen --- mips.igen 2002/02/28 02:57:34 1.15 +++ mips.igen 2002/02/28 06:57:29 @@ -2083,7 +2083,8 @@ } -110011,5.RS,nnnnn,16.OFFSET:NORMAL:32::PREF +110011,5.BASE,5.HINT,16.OFFSET:NORMAL:32::PREF +"pref , (r)" *mipsIV: *mipsV: *vr5000: @@ -3974,7 +3975,7 @@ } -010011,5.BASE,5.INDEX,5.HINT,00000001111:COP1X:32::PREFX +010011,5.BASE,5.INDEX,5.HINT,00000,001111:COP1X:32::PREFX "prefx , r(r)" *mipsIV: *mipsV: