Re: [PATCH v6] Enable tracing of pseudo-registers on ARM

Antoine Tremblay
2016-02-26T13:00:21Z

Yao Qi writes:

> Antoine Tremblay <antoine.tremblay@ericsson.com> writes:
>
>> @@ -20,7 +20,11 @@
>> * registers on x86_64.
>> */
>>
>
> The comments above should be updated as well.

Done.

>
>> +#if (defined __x86_64__)
>> #include <immintrin.h>
>> +#elif (defined __arm__ || defined __thumb2__ || defined __thumb__)
>
> __arm__ is defined even in thumb mode, so only "defined __arm__" is enough.
>
>> +#include <arm_neon.h>
>
> Why do you include arm_neon.h? I don't see anything NEON specific is used.
>
>> +#endif

Indeed I was playing with neon types before, forgot to remove it. Fixed.

>>
>> void
>> dummy (void)
>> @@ -37,6 +41,7 @@ main (void)
>> {
>> /* Strictly speaking, it should be ymm15 (xmm15 is 128-bit), but gcc older
>> than 4.9 doesn't recognize "ymm15" as a valid register name. */
>> +#if (defined __x86_64__)
>> register __v8si a asm("xmm15") = {
>> 0x12340001,
>> 0x12340002,
>> @@ -48,6 +53,13 @@ main (void)
>> 0x12340008,
>> };
>> asm volatile ("traceme: call dummy" : : "x" (a));
>> +#elif (defined __arm__ || defined __thumb2__ || defined __thumb__)
>
> Only "defined __arm__" is needed.
>

Done.

>> + register uint32_t a asm("s5") = {
>> + 0x2
>> + };
>
> I'd like to write an inline asm to set s5 a value and the value can be shown as
> an integer so that the test is more reliable (current test tests float
> "2.80259693e-45").
>

Done.

>> + asm volatile ("traceme: bl dummy" : : "x" (a));
>> +#endif
>> +
>> end ();
>> return 0;
>> }
>> diff --git a/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp b/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp
>> index 4c52c64..12a2740 100644
>> --- a/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp
>> +++ b/gdb/testsuite/gdb.trace/tracefile-pseudo-reg.exp
>> @@ -12,8 +12,8 @@
>> # You should have received a copy of the GNU General Public License
>> # along with this program. If not, see <http://www.gnu.org/licenses/>.
>>
>> -if { ! [is_amd64_regs_target] } {
>> - verbose "Skipping tfile AVX test (target is not x86_64)."
>> +if { ! [is_amd64_regs_target] && ! [istarget "arm*-*-*"] } {
>> + verbose "Skipping tracefile pseudo register tests, target is not supported."
>> return
>> }
>>
>> @@ -21,8 +21,14 @@ load_lib "trace-support.exp"
>>
>> standard_testfile
>>
>> +if { [is_amd64_regs_target] } {
>> + set add_flags "-mavx"
>> +} elseif { [istarget "arm*-*-*"] } {
>> + set add_flags "-mfpu=neon"
>
> Don't have to pass -mfpu=neon, because the case is also valid for vfp.
>

Right, Fixed.

>> +}
>> +
>> if {[prepare_for_testing $testfile.exp $testfile $srcfile \
>> - [list debug additional_flags=-mavx]]} {
>> + [list debug additional_flags=$add_flags]]} {
>> return -1
>> }
>>
>> @@ -36,20 +42,31 @@ if ![gdb_target_supports_trace] {
>> return -1
>> }
>>
>> -gdb_test_multiple "print \$ymm15" "check for AVX support" {
>> +if { [is_amd64_regs_target] } {
>> + set reg "\$ymm15"
>> + set reg_message "check for AVX support"
>> +} elseif { [istarget "arm*-*-*"] } {
>> + set reg "\$s5"
>> + set reg_message "check for Neon support"
>
> $s5 exists on the processors which support NEON or VFP, so the
> $reg_message isn't accurate. We can change reg_message to "check
> register $reg".

Done.

A v7 patch follows.