From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 24639 invoked by alias); 10 Jun 2003 16:24:07 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 24561 invoked from network); 10 Jun 2003 16:24:06 -0000 Received: from unknown (HELO zenia.home) (12.223.225.216) by sources.redhat.com with SMTP; 10 Jun 2003 16:24:06 -0000 Received: by zenia.home (Postfix, from userid 5433) id 131F920FE6; Tue, 10 Jun 2003 11:25:11 -0500 (EST) To: gdb-patches@sources.redhat.com Subject: [ppc64-linux]: correctly compute u-area register offsets From: Jim Blandy Date: Tue, 10 Jun 2003 16:24:00 -0000 Message-ID: User-Agent: Gnus/5.09 (Gnus v5.9.0) Emacs/21.3 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii X-SW-Source: 2003-06/txt/msg00326.txt.bz2 This patch contains all my fixes to ppc_register_u_addr to date; I think it's complete and correct. It combines a recent patch, "Compute u-area offsets of FP registers correctly" with a change I committed to the ppc64-linux branch a while back, and forgot to post. The patch I did post: http://sources.redhat.com/ml/gdb-patches/2003-06/msg00250.html 2003-06-10 Jim Blandy * ppc-linux-nat.c (ppc_register_u_addr): Correctly compute u-area register offsets for both the 32- and 64-bit interfaces. Index: gdb/ppc-linux-nat.c =================================================================== RCS file: /cvs/src/src/gdb/ppc-linux-nat.c,v retrieving revision 1.21.6.5 diff -c -r1.21.6.5 ppc-linux-nat.c *** gdb/ppc-linux-nat.c 10 Jun 2003 16:18:12 -0000 1.21.6.5 --- gdb/ppc-linux-nat.c 10 Jun 2003 16:20:14 -0000 *************** *** 127,160 **** { int u_addr = -1; struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); /* General purpose registers occupy 1 slot each in the buffer */ if (regno >= tdep->ppc_gp0_regnum && regno <= tdep->ppc_gplast_regnum ) ! u_addr = ((PT_R0 + regno) * 4); ! /* Floating point regs: 2 slots each */ if (regno >= FP0_REGNUM && regno <= FPLAST_REGNUM) ! u_addr = ((PT_FPR0 + (regno - FP0_REGNUM) * 2) * 4); /* UISA special purpose registers: 1 slot each */ if (regno == PC_REGNUM) ! u_addr = PT_NIP * 4; if (regno == tdep->ppc_lr_regnum) ! u_addr = PT_LNK * 4; if (regno == tdep->ppc_cr_regnum) ! u_addr = PT_CCR * 4; if (regno == tdep->ppc_xer_regnum) ! u_addr = PT_XER * 4; if (regno == tdep->ppc_ctr_regnum) ! u_addr = PT_CTR * 4; #ifdef PT_MQ if (regno == tdep->ppc_mq_regnum) ! u_addr = PT_MQ * 4; #endif if (regno == tdep->ppc_ps_regnum) ! u_addr = PT_MSR * 4; if (regno == tdep->ppc_fpscr_regnum) ! u_addr = PT_FPSCR * 4; return u_addr; } --- 127,163 ---- { int u_addr = -1; struct gdbarch_tdep *tdep = gdbarch_tdep (current_gdbarch); + int wordsize = tdep->wordsize; /* General purpose registers occupy 1 slot each in the buffer */ if (regno >= tdep->ppc_gp0_regnum && regno <= tdep->ppc_gplast_regnum ) ! u_addr = ((PT_R0 + regno) * wordsize); ! /* Floating point regs: eight bytes each in both 32- and 64-bit ! ptrace interfaces. Thus, two slots each in 32-bit interface, one ! slot each in 64-bit interface. */ if (regno >= FP0_REGNUM && regno <= FPLAST_REGNUM) ! u_addr = (PT_FPR0 * wordsize) + ((regno - FP0_REGNUM) * 8); /* UISA special purpose registers: 1 slot each */ if (regno == PC_REGNUM) ! u_addr = PT_NIP * wordsize; if (regno == tdep->ppc_lr_regnum) ! u_addr = PT_LNK * wordsize; if (regno == tdep->ppc_cr_regnum) ! u_addr = PT_CCR * wordsize; if (regno == tdep->ppc_xer_regnum) ! u_addr = PT_XER * wordsize; if (regno == tdep->ppc_ctr_regnum) ! u_addr = PT_CTR * wordsize; #ifdef PT_MQ if (regno == tdep->ppc_mq_regnum) ! u_addr = PT_MQ * wordsize; #endif if (regno == tdep->ppc_ps_regnum) ! u_addr = PT_MSR * wordsize; if (regno == tdep->ppc_fpscr_regnum) ! u_addr = PT_FPSCR * wordsize; return u_addr; }