From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 833 invoked by alias); 21 Jun 2004 11:08:50 -0000 Mailing-List: contact gdb-patches-help@sources.redhat.com; run by ezmlm Precedence: bulk List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sources.redhat.com Received: (qmail 826 invoked from network); 21 Jun 2004 11:08:49 -0000 Received: from unknown (HELO mx1.redhat.com) (66.187.233.31) by sourceware.org with SMTP; 21 Jun 2004 11:08:49 -0000 Received: from int-mx1.corp.redhat.com (int-mx1.corp.redhat.com [172.16.52.254]) by mx1.redhat.com (8.12.10/8.12.10) with ESMTP id i5LB8ne1005198 for ; Mon, 21 Jun 2004 07:08:49 -0400 Received: from pobox.corp.redhat.com (pobox.corp.redhat.com [172.16.52.156]) by int-mx1.corp.redhat.com (8.11.6/8.11.6) with ESMTP id i5LB8n014935 for ; Mon, 21 Jun 2004 07:08:49 -0400 Received: from livre.redhat.lsd.ic.unicamp.br (vpn64-20.boston.redhat.com [172.16.66.20]) by pobox.corp.redhat.com (8.12.8/8.12.8) with ESMTP id i5LB8lox030481 for ; Mon, 21 Jun 2004 07:08:48 -0400 Received: from livre.redhat.lsd.ic.unicamp.br (livre.redhat.lsd.ic.unicamp.br [127.0.0.1]) by livre.redhat.lsd.ic.unicamp.br (8.12.11/8.12.11) with ESMTP id i5LB8knK001032 for ; Mon, 21 Jun 2004 08:08:46 -0300 Received: (from aoliva@localhost) by livre.redhat.lsd.ic.unicamp.br (8.12.11/8.12.11/Submit) id i5LB8kOl001029; Mon, 21 Jun 2004 08:08:46 -0300 To: gdb-patches@sources.redhat.com Subject: h8300 sim fixes From: Alexandre Oliva Organization: Red Hat Global Engineering Services Compiler Team Date: Mon, 21 Jun 2004 11:08:00 -0000 Message-ID: User-Agent: Gnus/5.09 (Gnus v5.9.0) Emacs/21.3 MIME-Version: 1.0 Content-Type: multipart/mixed; boundary="=-=-=" X-SW-Source: 2004-06/txt/msg00474.txt.bz2 --=-=-= Content-length: 403 This patch: include/opcodes/ChangeLog: 2004-01-09 Anil Paranjpe * h8300.h (BITOP): Dissallow operations on @aa:16 and @aa:32 except for the H8S. introduced apparent regressions in the h8300 sim testsuite. This patch corrects them, such that we don't attempt to test features that will fail to assemble or to run on the processor variants we're testing. Ok to install? --=-=-= Content-Type: text/x-patch Content-Disposition: inline; filename=h8300-sim-testsuite-h8300s.patch Content-length: 2996 Index: sim/testsuite/sim/h8300/ChangeLog from Alexandre Oliva 2004-06-17 Alexandre Oliva * band.s, biand.s: imm3_abs16 is not available on h8300h. * bset.s: Likewise. Ditto for rn_abs32. Index: sim/testsuite/sim/h8300/band.s =================================================================== RCS file: /cvs/uberbaum/./sim/testsuite/sim/h8300/band.s,v retrieving revision 1.1 diff -u -p -r1.1 band.s --- sim/testsuite/sim/h8300/band.s 19 Jun 2003 02:40:12 -0000 1.1 +++ sim/testsuite/sim/h8300/band.s 21 Jun 2004 10:42:48 -0000 @@ -104,7 +104,7 @@ band_imm3_abs8: test_grs_a5a5 ; general registers should not be changed. -.if (sim_cpu) ; non-zero means not h8300 +.if (sim_cpu > h8300h) band_imm3_abs16: set_grs_a5a5 set_ccr_zero @@ -314,7 +314,7 @@ bld_imm3_abs8: test_grs_a5a5 ; general registers should not be changed. -.if (sim_cpu) ; non-zero means not h8300 +.if (sim_cpu > h8300h) bld_imm3_abs16: set_grs_a5a5 set_ccr_zero @@ -491,7 +491,7 @@ btst_imm3_abs8: test_grs_a5a5 ; general registers should not be changed. -.if (sim_cpu) ; non-zero means not h8300 +.if (sim_cpu > h8300h) btst_imm3_abs16: set_grs_a5a5 set_ccr_zero Index: sim/testsuite/sim/h8300/biand.s =================================================================== RCS file: /cvs/uberbaum/./sim/testsuite/sim/h8300/biand.s,v retrieving revision 1.1 diff -u -p -r1.1 biand.s --- sim/testsuite/sim/h8300/biand.s 19 Jun 2003 02:40:12 -0000 1.1 +++ sim/testsuite/sim/h8300/biand.s 21 Jun 2004 10:42:48 -0000 @@ -104,7 +104,7 @@ biand_imm3_abs8: test_grs_a5a5 ; general registers should not be changed. -.if (sim_cpu) ; non-zero means not h8300 +.if (sim_cpu > h8300h) biand_imm3_abs16: set_grs_a5a5 set_ccr_zero @@ -314,7 +314,7 @@ bild_imm3_abs8: test_grs_a5a5 ; general registers should not be changed. -.if (sim_cpu) ; non-zero means not h8300 +.if (sim_cpu > h8300h) bild_imm3_abs16: set_grs_a5a5 set_ccr_zero Index: sim/testsuite/sim/h8300/bset.s =================================================================== RCS file: /cvs/uberbaum/./sim/testsuite/sim/h8300/bset.s,v retrieving revision 1.2 diff -u -p -r1.2 bset.s --- sim/testsuite/sim/h8300/bset.s 19 Jun 2003 02:40:12 -0000 1.2 +++ sim/testsuite/sim/h8300/bset.s 21 Jun 2004 10:42:51 -0000 @@ -263,6 +263,7 @@ bclr_imm3_ind: test_gr_a5a5 6 test_gr_a5a5 7 +.if (sim_cpu > h8300h) bset_imm3_abs16: set_grs_a5a5 ; Fill all general regs with a fixed pattern @@ -383,6 +384,7 @@ bclr_imm3_abs16: test_gr_a5a5 6 test_gr_a5a5 7 .endif +.endif bset_rs8_rd8: set_grs_a5a5 ; Fill all general regs with a fixed pattern @@ -644,6 +646,7 @@ bclr_rs8_ind: test_gr_a5a5 6 test_gr_a5a5 7 +.if (sim_cpu > h8300h) bset_rs8_abs32: set_grs_a5a5 ; Fill all general regs with a fixed pattern @@ -780,6 +783,7 @@ bclr_rs8_abs32: test_gr_a5a5 6 test_gr_a5a5 7 .endif +.endif .if (sim_cpu == h8sx) bset_eq_imm3_abs16: --=-=-= Content-length: 188 -- Alexandre Oliva http://www.ic.unicamp.br/~oliva/ Red Hat Compiler Engineer aoliva@{redhat.com, gcc.gnu.org} Free Software Evangelist oliva@{lsd.ic.unicamp.br, gnu.org} --=-=-=--