Re: [rfc] Regcache revamp (vip)

[Jim Blandy <jimb@zwingli.cygnus.com>]

One question that comes to mind:

Suppose we are looking at a frame some of whose registers have been
saved on the stack by younger frames.  Suppose we try to store a new
value in a register, and the gdbarch method turns this store into two
stores to two different registers --- one of which is saved on the
stack, and one of which isn't.  So now this store needs to be split
across a register cache and a stack slot.

How this case work in your code?

I think stuff like this happens in processors that have 64-bit
callee-saves registers, but where functions sometimes save only the
lower 32 bits in their frames, since that's all they use.  As you
visit older frames, you end up with registers whose upper 32 bits are
still in the register file, but whose lower 32 bits are saved on the
stack.  Assigning a new 64-bit value to such a register requires
storing the upper 32 in the register file, and the lower 32 on the
stack.  (What fun!)