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From: Andreas Schwab <schwab@suse.de>
To: Jim Wilson <jimw@sifive.com>
Cc: John Baldwin <jhb@freebsd.org>,  Andrew Burgess <andrew.burgess@embecosm.com>,  gdb-patches@sourceware.org
Subject: Re: [PATCH 4/5] RISC-V: Add native linux support.
References: <CAFyWVaZoF3a=-QjADoUdzq_hz5skHVaxmXtB1X5ZT-a_sns5PA@mail.gmail.com>	<20180808233908.8149-1-jimw@sifive.com> <mvm8t2mpahm.fsf@suse.de>	<20181025110946.GN2929@embecosm.com>	<db9660fb-a22d-6123-a51a-e1570f8059a9@FreeBSD.org>	<CAFyWVaamVwLYgue_ZPjAG7SfOBTROyPCzmH4dPzsXTYDg5yPyw@mail.gmail.com>
X-Yow: GOOD-NIGHT, everybody..  Now I have to go administer FIRST-AID to my pet LEISURE SUIT!!
Date: Mon, 29 Oct 2018 08:50:00 -0000
In-Reply-To: <CAFyWVaamVwLYgue_ZPjAG7SfOBTROyPCzmH4dPzsXTYDg5yPyw@mail.gmail.com>	(Jim Wilson's message of "Thu, 25 Oct 2018 11:17:22 -0700")
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On Okt 25 2018, Jim Wilson <jimw@sifive.com> wrote:

> On Thu, Oct 25, 2018 at 10:55 AM John Baldwin <jhb@freebsd.org> wrote:
>> Now that the MISA defaults to 0 if not present, would it better to just remove
>> this and not set it to 0 explicitly?  The FreeBSD native target for RISC-V
>> doesn't set MISA to anything at all.
>
> There is still the issue of FP register size, which comes from MISA,
> unless perhaps we can get it from auxvec/hw-cap info.  I was going to
> look into that latter, and if the auxvec/hw-cap stuff works, then
> remove the remaining MISA support in the riscv-linux-nat.c file.

Note you need commit 0ddc77556c to get a correct AT_HWCAP.

Andreas.

-- 
Andreas Schwab, SUSE Labs, schwab@suse.de
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"And now for something completely different."