From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 83711 invoked by alias); 29 Aug 2018 23:36:30 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 83692 invoked by uid 89); 29 Aug 2018 23:36:30 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-12.2 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_2,GIT_PATCH_3,RCVD_IN_DNSWL_NONE,SPF_PASS autolearn=ham version=3.3.2 spammy=H*r:sk:s13-v6s, expert, Hx-languages-length:1131, Hx-spam-relays-external:209.85.210.195 X-HELO: mail-pf1-f195.google.com Received: from mail-pf1-f195.google.com (HELO mail-pf1-f195.google.com) (209.85.210.195) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 29 Aug 2018 23:36:29 +0000 Received: by mail-pf1-f195.google.com with SMTP id s13-v6so2977559pfi.7 for ; Wed, 29 Aug 2018 16:36:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=sifive.com; s=google; h=date:subject:in-reply-to:cc:from:to:message-id:mime-version :content-transfer-encoding; bh=BN4WAfOEAgQHYDVQ655np2YiFnLlqU1PkH0XE0EfQCk=; b=WHM+llTXmK1SWBYlDs/y2kx+dMWY1Kb56yBAwV7qWKZer+fDCSbUmuh91cz2vvGU8O B1GaTluTBayJ1Ui6MsqZWI/BQcMWBcWWA5Q9TcXEtCAsLd5dgX73/NfqcMA2z+IDrWGU CPaFN7WB/wtSTL1mdo7q3MFU2PjyRWnHola5HqO8WKVMjCe0iT0CmN0+1Zk6uM8bhAhs 2QBy62mqsCoFmOXYfMPNc3b4RgI09dy9eV8nHe8dMRS6hXTPytHZIuQ7J1BYl86L/MdQ mu7a5Heuz+O5Ekl5KR592YvVSMv2256IRdW5ERUCkEhWOmigjtMqyYQAF/PnPAQ1rR4C fA7Q== Return-Path: Received: from localhost ([12.206.222.5]) by smtp.gmail.com with ESMTPSA id x24-v6sm7051359pfh.67.2018.08.29.16.36.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 29 Aug 2018 16:36:26 -0700 (PDT) Date: Wed, 29 Aug 2018 23:36:00 -0000 X-Google-Original-Date: Wed, 29 Aug 2018 16:36:08 PDT (-0700) Subject: Re: [PATCH 0/4] RISCV Non-DWARF stack unwinding In-Reply-To: CC: gdb-patches@sourceware.org, Jim Wilson , andrew.burgess@embecosm.com From: Palmer Dabbelt To: andrew.burgess@embecosm.com Message-ID: Mime-Version: 1.0 (MHng) Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: 8bit X-SW-Source: 2018-08/txt/msg00788.txt.bz2 On Wed, 29 Aug 2018 09:40:50 PDT (-0700), andrew.burgess@embecosm.com wrote: > A series of patches providing non-DWARF stack unwinding on RISC-V. > Tested on a set of targetes including with and without compressed, and > FP, and on 32 and 64 bit. > > Patch #3 touches generic code and so will need global maintainer > review before I can commit. > > Review and feedback is welcome for all of the other patches too. I have a few minor comments, but nothing that should block merging the patches on my end. No idea about the global stuff, though, as I'm far from a GDB expert. Thanks! > > Thanks, > Andrew > > --- > > Andrew Burgess (4): > gdb/riscv: remove extra caching of misa register > gdb/riscv: Extend instruction decode to cover more instructions > gdb: Extend the trad-frame API > gdb/riscv: Provide non-DWARF stack unwinder > > gdb/ChangeLog | 42 +++++++ > gdb/riscv-tdep.c | 361 +++++++++++++++++++++++++++++++++---------------------- > gdb/riscv-tdep.h | 2 + > gdb/trad-frame.c | 21 +++- > gdb/trad-frame.h | 8 ++ > 5 files changed, 287 insertions(+), 147 deletions(-)