From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 2422 invoked by alias); 17 Apr 2013 04:56:26 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 2411 invoked by uid 89); 17 Apr 2013 04:56:25 -0000 X-Spam-SWARE-Status: No, score=-6.6 required=5.0 tests=AWL,BAYES_00,KHOP_RCVD_UNTRUST,RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,SPF_HELO_PASS autolearn=ham version=3.3.1 Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.84/v0.84-167-ge50287c) with ESMTP; Wed, 17 Apr 2013 04:56:24 +0000 Received: from int-mx02.intmail.prod.int.phx2.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) by mx1.redhat.com (8.14.4/8.14.4) with ESMTP id r3H4uNXC011374 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=OK) for ; Wed, 17 Apr 2013 00:56:23 -0400 Received: from psique (ovpn-113-115.phx2.redhat.com [10.3.113.115]) by int-mx02.intmail.prod.int.phx2.redhat.com (8.13.8/8.13.8) with ESMTP id r3H4uKXK017133 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES128-SHA bits=128 verify=NO); Wed, 17 Apr 2013 00:56:21 -0400 From: Sergio Durigan Junior To: GDB Patches Cc: Andrew Haley , Tom Tromey Subject: [PATCH] Fix ARM sign-extension on PC when using 64-bit BFD X-URL: http://www.redhat.com Date: Wed, 17 Apr 2013 14:33:00 -0000 Message-ID: User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/24.1 (gnu/linux) MIME-Version: 1.0 Content-Type: text/plain X-SW-Source: 2013-04/txt/msg00519.txt.bz2 Hi, Andrew Haley found a bug on GDB running on ARM when using --enable-64-bit-bfd. Basically the issue happens when dealing with "bl" instructions: GDB does branch destination calculation and (wrongly) sign-extends the PC. Here is a piece of his original message explaining the problem: > next_pc = arm_get_next_pc (frame, get_frame_pc (frame)); > > /* The Linux kernel offers some user-mode helpers in a high page. We can > not read this page (as of 2.6.23), and even if we could then we couldn't > set breakpoints in it, and even if we could then the atomic operations > would fail when interrupted. They are all called as functions and return > to the address in LR, so step to there instead. */ > if (next_pc > 0xffff0000) > next_pc = get_frame_register_unsigned (frame, ARM_LR_REGNUM); > > arm_insert_single_step_breakpoint (gdbarch, aspace, next_pc); > > Unfortunately, branch destination addresses are SIGN EXTENDED to 64 > bits. So, > > (top-gdb) p/x next_pc > $14 = 0xffffffffb6df2864 > > Which triggers the next_pc = get_frame_register_unsigned(), and we > cannot step into any branches because the destination PC is wrong. Anyway, the fix is simple and Andrew himself provided it for us. It took a while for me to figure out how to trigger the bug (in order to write a testcase for it), but I finally made it. The attached patch fixes the problem (by casting to `unsigned long' instead of just `long'), and also includes a testcase to reproduce the issue. OK to apply? BTW, I guess this is trivial enough to be included in 7.6 as well, do you agree? Thanks, -- Sergio gdb/ 2013-04-11 Andrew Haley * arm-tdep.c (BranchDest): Cast result as "unsigned long", instead of "long". gdb/testsuite 2013-04-11 Sergio Durigan Junior * gdb.arch/arm-bl-branch-dest.c: New file. * gdb.arch/arm-bl-branch-dest.exp: Likewise. diff --git a/gdb/arm-tdep.c b/gdb/arm-tdep.c index 2a11890..16cb488 100644 --- a/gdb/arm-tdep.c +++ b/gdb/arm-tdep.c @@ -521,7 +521,7 @@ skip_prologue_function (struct gdbarch *gdbarch, CORE_ADDR pc, int is_thumb) #define sbits(obj,st,fn) \ ((long) (bits(obj,st,fn) | ((long) bit(obj,fn) * ~ submask (fn - st)))) #define BranchDest(addr,instr) \ - ((CORE_ADDR) (((long) (addr)) + 8 + (sbits (instr, 0, 23) << 2))) + ((CORE_ADDR) (((unsigned long) (addr)) + 8 + (sbits (instr, 0, 23) << 2))) /* Extract the immediate from instruction movw/movt of encoding T. INSN1 is the first 16-bit of instruction, and INSN2 is the second 16-bit of diff --git a/gdb/testsuite/gdb.arch/arm-bl-branch-dest.c b/gdb/testsuite/gdb.arch/arm-bl-branch-dest.c new file mode 100644 index 0000000..98269d0 --- /dev/null +++ b/gdb/testsuite/gdb.arch/arm-bl-branch-dest.c @@ -0,0 +1,29 @@ +/* This testcase is part of GDB, the GNU debugger. + + Copyright 2013 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see . */ + +static void +foo (int a) +{ + ++a; +} + +int +main (int argc, char *argv[]) +{ + foo (10); + return 0; +} diff --git a/gdb/testsuite/gdb.arch/arm-bl-branch-dest.exp b/gdb/testsuite/gdb.arch/arm-bl-branch-dest.exp new file mode 100644 index 0000000..1e433f3 --- /dev/null +++ b/gdb/testsuite/gdb.arch/arm-bl-branch-dest.exp @@ -0,0 +1,37 @@ +# Copyright (C) 2013 Free Software Foundation, Inc. +# +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see . + +if { ![istarget "arm*-*-*"] } { + verbose "Skipping ${testfile}." + return +} + +standard_testfile + +# We need to load the text segment in a high address. This is because +# the bug we are dealing with happened when GDB sign-extended the PC +# on ARM, causing the PC to acquire a wrong value. That's why we use +# the "-Wl,-Ttext-segment" option compile the binary. + +if { [prepare_for_testing ${testfile}.exp ${testfile} ${srcfile} \ + [list debug ldflags=-Wl,-Ttext-segment=0xb0000000]] } { + return -1 +} + +if { ![runto_main] } { + return -1 +} + +gdb_test "next" "\[0-9\]+\\s+return 0;"