From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 22540 invoked by alias); 23 Apr 2010 20:28:39 -0000 Received: (qmail 22531 invoked by uid 22791); 23 Apr 2010 20:28:39 -0000 X-SWARE-Spam-Status: No, hits=-1.1 required=5.0 tests=BAYES_00,DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,SARE_MSGID_LONG45,SPF_HELO_PASS,T_RP_MATCHES_RCVD X-Spam-Check-By: sourceware.org Received: from smtp-out.google.com (HELO smtp-out.google.com) (74.125.121.35) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 23 Apr 2010 20:28:33 +0000 Received: from wpaz17.hot.corp.google.com (wpaz17.hot.corp.google.com [172.24.198.81]) by smtp-out.google.com with ESMTP id o3NKSTk1026839 for ; Fri, 23 Apr 2010 22:28:29 +0200 Received: from pwj1 (pwj1.prod.google.com [10.241.219.65]) by wpaz17.hot.corp.google.com with ESMTP id o3NKSRd3031453 for ; Fri, 23 Apr 2010 13:28:28 -0700 Received: by pwj1 with SMTP id 1so6159009pwj.9 for ; Fri, 23 Apr 2010 13:28:27 -0700 (PDT) MIME-Version: 1.0 Received: by 10.141.187.13 with SMTP id o13mr785073rvp.24.1272054507065; Fri, 23 Apr 2010 13:28:27 -0700 (PDT) Received: by 10.141.91.13 with HTTP; Fri, 23 Apr 2010 13:28:27 -0700 (PDT) In-Reply-To: <4BD1BBE3020000520000FC62@pluto.sron.nl> References: <4BD1BBE3020000520000FC62@pluto.sron.nl> Date: Fri, 23 Apr 2010 20:28:00 -0000 Message-ID: Subject: Re: [patch] sim/erc32/ max simulation time extended by using 64bit ints From: Doug Evans To: Tiemen Schut Cc: gdb-patches@sourceware.org, joel.sherrill@oarcorp.com Content-Type: text/plain; charset=ISO-8859-1 X-System-Of-Record: true X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2010-04/txt/msg00816.txt.bz2 On Fri, Apr 23, 2010 at 6:25 AM, Tiemen Schut wrote: > Hey all, > > This patch solves the problem that the sparc instruction simulator (SIS) would hang after a few minutes of simulation time (time depending on speed of host pc), because of the use of 32 bit counters internally. > > This patch doesn't change anything to simulator behaviour, except that it allows for longer simulation times. > > There may be a problem with the use of 64 bit integers, but that was also there before this patch. > > Thanks, > > Tiemen Schut Hi. The patch is ok with me, with a few changes. I'd leave it a week to see if anyone else has something to say. 1) -#define VAL(x) strtol(x,(char **)NULL,0) +#define VAL(x) strtoull(x,(char **)NULL,0) I realize VAL is only used once in interf.c but it's also defined in other files as well. While one could consolidate them, having the macro at all is probably less preferable to just calling strtoul{,l} directly. I would just remove it from interf.c and call strtoull directly. 2) @@ -338,10 +338,10 @@ int sim_fetch_register(sd, regno, buf, length) - SIM_DESC sd; - int regno; - unsigned char *buf; - int length; + SIM_DESC sd; + int regno; + unsigned char *buf; + int length; { get_regi(&sregs, regno, buf); return -1; @@ -349,10 +349,10 @@ int sim_write(sd, mem, buf, length) - SIM_DESC sd; - SIM_ADDR mem; + SIM_DESC sd; + SIM_ADDR mem; const unsigned char *buf; - int length; + int length; { return (sis_memory_write(mem, buf, length)); } Generally, formatting changes/fixes should be separate. I noticed a few, can you remove them? 3) +#include "stdint.h" That should be 4) - uint32 ildreg; /* Destination of last load instruction */ + uint64 ildreg; /* Destination of last load instruction */ No point in making this uint64, leave it as uint32. 5) + * sis.c, func.c, sis.h, interf.c: Increase max simulation time + by using uint64 for relevant counters. I realize sim/erc32/ChangeLog doesn't always follow the GNU conventions for ChangeLog entries - it's software obtained from elsewhere. It's ok with me to leave as is, but I defer to someone else with an opinion. 6) I'm assuming this change has been well tested.