From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 18606 invoked by alias); 4 Mar 2009 21:47:58 -0000 Received: (qmail 18592 invoked by uid 22791); 4 Mar 2009 21:47:57 -0000 X-SWARE-Spam-Status: No, hits=-3.1 required=5.0 tests=AWL,BAYES_00,RCVD_IN_DNSWL_LOW,SPF_HELO_PASS,SPF_PASS X-Spam-Check-By: sourceware.org Received: from main.gmane.org (HELO ciao.gmane.org) (80.91.229.2) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Wed, 04 Mar 2009 21:47:51 +0000 Received: from list by ciao.gmane.org with local (Exim 4.43) id 1LeywO-00032L-27 for gdb-patches@sources.redhat.com; Wed, 04 Mar 2009 21:47:48 +0000 Received: from enigma.qnx.com ([209.226.137.106]) by main.gmane.org with esmtp (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Wed, 04 Mar 2009 21:47:48 +0000 Received: from aristovski by enigma.qnx.com with local (Gmexim 0.1 (Debian)) id 1AlnuQ-0007hv-00 for ; Wed, 04 Mar 2009 21:47:48 +0000 To: gdb-patches@sources.redhat.com From: Aleksandar Ristovski Subject: Re: [patch] mips-tdep: info registers Date: Wed, 04 Mar 2009 21:47:00 -0000 Message-ID: References: <20090223020820.GC26056@adacore.com> <20090223025230.GA11699@caradoc.them.org> <200902230718.n1N7IoBD028396@brahms.sibelius.xs4all.nl> <20090223161756.GA19411@caradoc.them.org> <20090223162602.GH26056@adacore.com> <20090227195607.GJ26056@adacore.com> Mime-Version: 1.0 Content-Type: multipart/mixed; boundary="------------080404060405020102000208" User-Agent: Thunderbird 2.0.0.19 (Windows/20081209) In-Reply-To: <20090227195607.GJ26056@adacore.com> X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2009-03/txt/msg00057.txt.bz2 This is a multi-part message in MIME format. --------------080404060405020102000208 Content-Type: text/plain; charset=ISO-8859-1; format=flowed Content-Transfer-Encoding: 7bit Content-length: 1366 Joel Brobecker wrote: > I think there are two parts to this patch: > ... > > This patch is fine, and approved. Please just run it through the testsuite > before checking in. (can you remember to post a ChangeLog for it as well?) Ok, I committed this part. I have had weird issues with running testsuite, I ended up running all the test one-by-one. (tested on linux). > > The mips-tdep part can be treated independently. Although I don't see > any problem with it, and you updated it the same way I would have changed > it, I'm not sure about going against the comment: > >> /* Map [gdbarch_num_regs .. 2*gdbarch_num_regs) onto the raw registers, >> but then don't make the raw register names visible. */ > > It looks fine to return "0" ... "31" as the names of the raw registers, > but I'd like someone with more experience with the mips target to confirm > it. ... I made all suggested changes. New patch is attached. Note: I tested this on our gdb based on gdb 6.8 sources, using our remote protocol to connect to a MIPS target. The changes are the same - the code affected by the patch does not differ. On the HEAD gdb sources I did a compile but I could not do a test on the target. Thanks, Aleksandar * mips-tdep.c (mips_register_name): Handle numeric GPR register numbers. (mips_print_registers_info): Remove gdb_assert. --------------080404060405020102000208 Content-Type: text/x-patch; name="mips-tdep.c-info-registers-20090304.diff" Content-Transfer-Encoding: 7bit Content-Disposition: inline; filename="mips-tdep.c-info-registers-20090304.diff" Content-length: 1775 Index: gdb/mips-tdep.c =================================================================== RCS file: /cvs/src/src/gdb/mips-tdep.c,v retrieving revision 1.490 diff -u -p -r1.490 mips-tdep.c --- gdb/mips-tdep.c 22 Feb 2009 01:02:17 -0000 1.490 +++ gdb/mips-tdep.c 4 Mar 2009 21:39:25 -0000 @@ -440,13 +440,27 @@ mips_register_name (struct gdbarch *gdba "t8", "t9", "k0", "k1", "gp", "sp", "s8", "ra" }; + /* MIPS GPR register numbers, as used by assembler. Order must + reflect gdb's regno<->MIPS register number mapping which is + currently 1-1. */ + static char *mips_gpr_numeric_names[] = { + "0", "1", "2", "3", "4", "5", "6", "7", + "8", "9", "10", "11", "12", "13", "14", "15", + "16", "17", "18", "19", "20", "21", "22", "23", + "24", "25", "26", "27", "28", "29", "30", "31" + }; + enum mips_abi abi = mips_abi (gdbarch); - /* Map [gdbarch_num_regs .. 2*gdbarch_num_regs) onto the raw registers, - but then don't make the raw register names visible. */ + /* Map [gdbarch_num_regs .. 2*gdbarch_num_regs) onto the raw registers. */ int rawnum = regno % gdbarch_num_regs (gdbarch); if (regno < gdbarch_num_regs (gdbarch)) - return ""; + { + if (regno >= 0 && regno < 32) + return mips_gpr_numeric_names [regno]; + else + return ""; + } /* The MIPS integer registers are always mapped from 0 to 31. The names of the registers (which reflects the conventions regarding @@ -4601,7 +4615,6 @@ mips_print_registers_info (struct gdbarc { if (regnum != -1) /* do one specified register */ { - gdb_assert (regnum >= gdbarch_num_regs (gdbarch)); if (*(gdbarch_register_name (gdbarch, regnum)) == '\0') error (_("Not a valid register for the current processor type")); --------------080404060405020102000208--