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From: Andrew Burgess <andrew.burgess@embecosm.com>
To: binutils@sourceware.org, gdb-patches@sourceware.org
Subject: [PATCH 6/8] bfd/binutils: add support for RISC-V CSRs in core files
Date: Wed,  2 Dec 2020 17:39:30 +0000	[thread overview]
Message-ID: <fa3d7a03e6eb80ea780019007095567c773f89a7.1606930261.git.andrew.burgess@embecosm.com> (raw)
In-Reply-To: <cover.1606930261.git.andrew.burgess@embecosm.com>

Adds support for including RISC-V control and status registers into
core files.

bfd/ChangeLog:

	* elf-bfd.h (elfcore_write_riscv_csr): Declare.
	* elf.c (elfcore_grok_riscv_csr): New function.
	(elfcore_grok_note): Handle NT_RISCV_CSR.
	(elfcore_write_riscv_csr): New function.
	(elfcore_write_register_note): Handle '.reg-riscv-csr'.

binutils/ChangeLog:

	* readelf.c (get_note_type): Handle NT_RISCV_CSR.

include/ChangeLog:

	* elf/common.h (NT_RISCV_CSR): Define.
---
 bfd/ChangeLog        |  9 +++++++++
 bfd/elf-bfd.h        |  2 ++
 bfd/elf.c            | 31 +++++++++++++++++++++++++++----
 binutils/ChangeLog   |  5 +++++
 binutils/readelf.c   |  2 ++
 include/ChangeLog    |  5 +++++
 include/elf/common.h |  2 ++
 7 files changed, 52 insertions(+), 4 deletions(-)

diff --git a/bfd/elf-bfd.h b/bfd/elf-bfd.h
index 5ef69ab5b13..7de09c269f9 100644
--- a/bfd/elf-bfd.h
+++ b/bfd/elf-bfd.h
@@ -2796,6 +2796,8 @@ extern char *elfcore_write_aarch_pauth
   (bfd *, char *, int *, const void *, int);
 extern char *elfcore_write_arc_v2
   (bfd *, char *, int *, const void *, int);
+extern char *elfcore_write_riscv_csr
+  (bfd *, char *, int *, const void *, int);
 extern char *elfcore_write_gdb_tdesc
   (bfd *, char *, int *, const void *, int);
 extern char *elfcore_write_lwpstatus
diff --git a/bfd/elf.c b/bfd/elf.c
index bea5ab12773..62036db4c69 100644
--- a/bfd/elf.c
+++ b/bfd/elf.c
@@ -9909,6 +9909,12 @@ elfcore_grok_arc_v2 (bfd *abfd, Elf_Internal_Note *note)
   return elfcore_make_note_pseudosection (abfd, ".reg-arc-v2", note);
 }
 
+static bfd_boolean
+elfcore_grok_riscv_csr (bfd *abfd, Elf_Internal_Note *note)
+{
+  return elfcore_make_note_pseudosection (abfd, ".reg-riscv-csr", note);
+}
+
 static bfd_boolean
 elfcore_grok_gdb_tdesc (bfd *abfd, Elf_Internal_Note *note)
 {
@@ -10575,6 +10581,9 @@ elfcore_grok_note (bfd *abfd, Elf_Internal_Note *note)
     case NT_GDB_TDESC:
       return elfcore_grok_gdb_tdesc (abfd, note);
 
+    case NT_RISCV_CSR:
+      return elfcore_grok_riscv_csr (abfd, note);
+
     case NT_PRPSINFO:
     case NT_PSINFO:
       if (bed->elf_backend_grok_psinfo)
@@ -11956,12 +11965,24 @@ elfcore_write_arc_v2 (bfd *abfd,
 			     note_name, NT_ARC_V2, arc_v2, size);
 }
 
+char *
+elfcore_write_riscv_csr (bfd *abfd,
+                         char *buf,
+                         int *bufsiz,
+                         const void *csrs,
+                         int size)
+{
+  const char *note_name = "CORE";
+  return elfcore_write_note (abfd, buf, bufsiz,
+			     note_name, NT_RISCV_CSR, csrs, size);
+}
+
 char *
 elfcore_write_gdb_tdesc (bfd *abfd,
-			 char *buf,
-			 int *bufsiz,
-			 const void *tdesc,
-			 int size)
+                     char *buf,
+                     int *bufsiz,
+                     const void *tdesc,
+                     int size)
 {
   const char *note_name = "CORE";
   return elfcore_write_note (abfd, buf, bufsiz,
@@ -12054,6 +12075,8 @@ elfcore_write_register_note (bfd *abfd,
     return elfcore_write_arc_v2 (abfd, buf, bufsiz, data, size);
   if (strcmp (section, ".gdb-tdesc") == 0)
     return elfcore_write_gdb_tdesc (abfd, buf, bufsiz, data, size);
+  if (strcmp (section, ".reg-riscv-csr") == 0)
+    return elfcore_write_riscv_csr (abfd, buf, bufsiz, data, size);
   return NULL;
 }
 
diff --git a/binutils/readelf.c b/binutils/readelf.c
index 5b3871d3e5f..4706d40f7ce 100644
--- a/binutils/readelf.c
+++ b/binutils/readelf.c
@@ -18324,6 +18324,8 @@ get_note_type (Filedata * filedata, unsigned e_type)
 	return _("NT_ARM_HW_WATCH (AArch hardware watchpoint registers)");
       case NT_ARC_V2:
 	return _("NT_ARC_V2 (ARC HS accumulator/extra registers)");
+      case NT_RISCV_CSR:
+	return _("NT_RISCV_CSR (RISC-V control and status registers)");
       case NT_PSTATUS:
 	return _("NT_PSTATUS (pstatus structure)");
       case NT_FPREGS:
diff --git a/include/elf/common.h b/include/elf/common.h
index 1dbf0b11983..54d5d989a39 100644
--- a/include/elf/common.h
+++ b/include/elf/common.h
@@ -663,6 +663,8 @@
 					/*   note name must be "LINUX".  */
 #define NT_ARC_V2	0x600		/* ARC HS accumulator/extra registers.  */
 					/*   note name must be "LINUX".  */
+#define NT_RISCV_CSR    0x501           /* RISC-V Control and Status Registers */
+                                        /*   note name must be "CORE".  */
 #define NT_SIGINFO	0x53494749	/* Fields of siginfo_t.  */
 #define NT_FILE		0x46494c45	/* Description of mapped files.  */
 
-- 
2.25.4


  parent reply	other threads:[~2020-12-02 17:40 UTC|newest]

Thread overview: 38+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-12-02 17:39 [PATCH 0/8] Bare-metal core dumps for RISC-V Andrew Burgess
2020-12-02 17:39 ` [PATCH 1/8] gdb/riscv: use a single regset supply function for riscv fbsd & linux Andrew Burgess
2021-01-18 14:15   ` Andrew Burgess
2020-12-02 17:39 ` [PATCH 2/8] bfd/binutils: support for gdb target descriptions in the core file Andrew Burgess
2020-12-02 18:21   ` Luis Machado via Gdb-patches
2020-12-02 22:58     ` Jim Wilson
2020-12-03 12:16       ` Luis Machado via Gdb-patches
     [not found]         ` <20201214115512.GI2945@embecosm.com>
2021-01-11 10:19           ` Andrew Burgess
2021-01-11 13:03             ` Luis Machado via Gdb-patches
2020-12-07 12:48     ` Andrew Burgess
2020-12-02 17:39 ` [PATCH 3/8] gdb: write target description into " Andrew Burgess
2020-12-03 20:36   ` Tom Tromey
2020-12-07 14:38     ` Andrew Burgess
2020-12-02 17:39 ` [PATCH 4/8] bfd/riscv: prepare to handle bare metal core dump creation Andrew Burgess
2020-12-02 23:24   ` Jim Wilson
2020-12-07 14:39     ` Andrew Burgess
2020-12-02 17:39 ` [PATCH 5/8] gdb/riscv: introduce bare metal core dump support Andrew Burgess
2020-12-02 18:12   ` Luis Machado via Gdb-patches
2020-12-07 15:17     ` Andrew Burgess
2020-12-07 15:58       ` Luis Machado via Gdb-patches
2020-12-07 16:58         ` Andrew Burgess
2020-12-07 17:24           ` Luis Machado via Gdb-patches
2020-12-07 18:11             ` Andrew Burgess
2020-12-07 19:00               ` Luis Machado via Gdb-patches
2020-12-07 19:23                 ` Andrew Burgess
2020-12-07 19:39                   ` Luis Machado via Gdb-patches
2020-12-07 19:51                     ` Paul Mathieu via Gdb-patches
2020-12-13 10:13                       ` Fredrik Hederstierna via Gdb-patches
2020-12-02 17:39 ` Andrew Burgess [this message]
2020-12-02 23:50   ` [PATCH 6/8] bfd/binutils: add support for RISC-V CSRs in core files Jim Wilson
2020-12-07 15:19     ` Andrew Burgess
2020-12-14 13:37     ` Andrew Burgess
2020-12-02 17:39 ` [PATCH 7/8] gdb/riscv: make riscv target description names global Andrew Burgess
2020-12-02 17:39 ` [PATCH 8/8] gdb/riscv: write CSRs into baremetal core dumps Andrew Burgess
2020-12-02 23:59 ` [PATCH 0/8] Bare-metal core dumps for RISC-V Jim Wilson
2020-12-07 12:10   ` Andrew Burgess
2020-12-07 19:57     ` Jim Wilson
2020-12-03 20:40 ` Tom Tromey

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