From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 14813 invoked by alias); 21 Aug 2009 06:00:57 -0000 Received: (qmail 14802 invoked by uid 22791); 21 Aug 2009 06:00:53 -0000 X-SWARE-Spam-Status: No, hits=-1.8 required=5.0 tests=AWL,BAYES_00,SARE_MSGID_LONG40,SPF_PASS X-Spam-Check-By: sourceware.org Received: from smtp-out.google.com (HELO smtp-out.google.com) (216.239.33.17) by sourceware.org (qpsmtpd/0.43rc1) with ESMTP; Fri, 21 Aug 2009 06:00:44 +0000 Received: from wpaz1.hot.corp.google.com (wpaz1.hot.corp.google.com [172.24.198.65]) by smtp-out.google.com with ESMTP id n7L60evV015000 for ; Fri, 21 Aug 2009 07:00:40 +0100 Received: from ywh40 (ywh40.prod.google.com [10.192.8.40]) by wpaz1.hot.corp.google.com with ESMTP id n7L60UPJ001804 for ; Thu, 20 Aug 2009 23:00:38 -0700 Received: by ywh40 with SMTP id 40so760829ywh.14 for ; Thu, 20 Aug 2009 23:00:38 -0700 (PDT) MIME-Version: 1.0 Received: by 10.150.239.19 with SMTP id m19mr1462889ybh.247.1250834438098; Thu, 20 Aug 2009 23:00:38 -0700 (PDT) In-Reply-To: <200907082146.40513.pedro@codesourcery.com> References: <7e6c8d660907081308r13bff580rdcf4822c77df8403@mail.gmail.com> <200907082146.40513.pedro@codesourcery.com> Date: Fri, 21 Aug 2009 06:25:00 -0000 Message-ID: Subject: Re: [RFA] Use data cache for stack accesses From: Doug Evans To: Pedro Alves Cc: gdb-patches@sourceware.org, Jacob Potter Content-Type: text/plain; charset=ISO-8859-1 Content-Transfer-Encoding: quoted-printable X-System-Of-Record: true X-IsSubscribed: yes Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org X-SW-Source: 2009-08/txt/msg00337.txt.bz2 On Wed, Jul 8, 2009 at 1:46 PM, Pedro Alves wrote: > On Wednesday 08 July 2009 21:08:00, Jacob Potter write: >> --- a/gdb/thread.c >> +++ b/gdb/thread.c >> @@ -848,6 +848,9 @@ switch_to_thread (ptid_t ptid) >> =A0 =A0if (ptid_equal (ptid, inferior_ptid)) >> =A0 =A0 =A0return; >> >> + =A0if (ptid_get_pid (ptid) !=3D ptid_get_pid (inferior_ptid)) >> + =A0 =A0dcache_invalidate (target_dcache); >> + > > I'm not sure this would be 100% multi-address space safe. > > Do we not have places where we switch inferior_ptid temporarily > before calling reading memory, with save_inferior_ptid, without > going through the high level switch_to_thread ? Yeah. > What if we do this within dcache itself, similarly > to get_thread_regcache? =A0That would be probably in [dcache_xfer_partial= ]. It seems that given that we can temporarily change inferiors without giving subsystems notice of the change, and given vfork, then we need to have intelligence in dcache to handle this (and then it's not clear if we should keep one dcache per inferior). How about having memory_xfer_partial notify dcache of every write/read, and then dcache could keep just one copy of the cache and flush it appropriately?