From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 94813 invoked by alias); 19 Dec 2017 15:57:42 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 93700 invoked by uid 89); 19 Dec 2017 15:57:41 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-23.8 required=5.0 tests=AWL,BAYES_00,GIT_PATCH_0,GIT_PATCH_1,GIT_PATCH_2,GIT_PATCH_3,KAM_LAZY_DOMAIN_SECURITY,KAM_SHORT,RCVD_IN_DNSWL_NONE,T_RP_MATCHES_RCVD autolearn=ham version=3.3.2 spammy=assigns, rights X-HELO: mail.rt-rk.com Received: from mx2.rt-rk.com (HELO mail.rt-rk.com) (89.216.37.149) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Tue, 19 Dec 2017 15:57:38 +0000 Received: from localhost (localhost [127.0.0.1]) by mail.rt-rk.com (Postfix) with ESMTP id 0A6E01A5395; Tue, 19 Dec 2017 16:57:35 +0100 (CET) Received: from [10.10.13.119] (rtrkw512-lin.domain.local [10.10.13.119]) by mail.rt-rk.com (Postfix) with ESMTPSA id E2CEE1A5390; Tue, 19 Dec 2017 16:57:34 +0100 (CET) Subject: Re: [PING][PATCH] Fix for prologue processing on PowerPC To: pedromfc , Kevin Buettner Cc: gdb-patches@sourceware.org, "Ananthakrishna Sowda (asowda)" , "Ivan Baev (ibaev)" , 'Nemanja Popov' , Djordje Todorovic , Ulrich.Weigand@de.ibm.com References: <20171108095850.394a48ca@pinnacle.lan> <8bf0014c-e83c-5988-4d06-173572f21186@rt-rk.com> <7ba16b14-9384-34d9-937e-531a2192842a@linux.vnet.ibm.com> From: Nikola Prica Message-ID: Date: Tue, 19 Dec 2017 15:57:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:52.0) Gecko/20100101 Thunderbird/52.5.0 MIME-Version: 1.0 In-Reply-To: <7ba16b14-9384-34d9-937e-531a2192842a@linux.vnet.ibm.com> Content-Type: text/plain; charset=utf-8; format=flowed Content-Transfer-Encoding: quoted-printable X-SW-Source: 2017-12/txt/msg00428.txt.bz2 Hello Pedro and Kevi, I've created and tested example based on your example. Thank you for that. > - I think it's more clear to only set lr_register when needed (pc > reaches the limit), as opposed to resetting it to -1 if pc didn't reach > the limit. The body of condition that becomes visitable after this patch=20 invalidates lr_reg by setting it to -2 before reaching the limit. else if (lr_reg >=3D 0 && /* std Rx, NUM(r1) || stdu Rx, NUM(r1) */ (((op & 0xffff0000) =3D=3D (lr_reg | 0xf8010000)) || /* stw Rx, NUM(r1) */ ((op & 0xffff0000) =3D=3D (lr_reg | 0x90010000)) || /* stwu Rx, NUM(r1) */ ((op & 0xffff0000) =3D=3D (lr_reg | 0x94010000)))) { /* where Rx =3D=3D lr */ fdata->lr_offset =3D offset; fdata->nosavedpc =3D 0; /* Invalidate lr_reg, but don't set it to -1. That would mean that it had never been set. */ lr_reg =3D -2; ... Thanks, Nikola From 9aaddf9670d9f4cb7f088499febd1fa9c6a7076c Mon Sep 17 00:00:00 2001 From: Prica Date: Tue, 19 Dec 2017 14:29:09 +0100 Subject: [PATCH] Fix for prologue processing on PowerPc One of conditions in skip_prologue() is never visited because it expects non shifted `lr_reg`. That condtition is supposed to set PC offset. When body of this condition is visited PC offset is set and there will be no need to look for it in next frames nor to use frame unwind directives. gdb/ChangeLog: *rs600-tdep.c (skip_prologue): Remove shifting for lr_reg and assign shifted lr_reg to fdata->lr_register when lr_reg is set. If iteration do not hit lim_pc lr_register is set as -1. *testsuite/gdb.arch/ppc-prologue-frame.s: New file. *testsuite/gdb.arch/ppc-prologue-frame.c: Likewise. *testsuite/gdb.arch/ppr-prologue-frame.exp: Likewise. --- gdb/rs6000-tdep.c | 14 ++++--- gdb/testsuite/gdb.arch/powerpc-prologue-frame.c | 28 +++++++++++++ gdb/testsuite/gdb.arch/powerpc-prologue-frame.exp | 48=20 +++++++++++++++++++++++ gdb/testsuite/gdb.arch/powerpc-prologue-frame.s | 40 +++++++++++++++++++ 4 files changed, 125 insertions(+), 5 deletions(-) create mode 100644 gdb/testsuite/gdb.arch/powerpc-prologue-frame.c create mode 100644 gdb/testsuite/gdb.arch/powerpc-prologue-frame.exp create mode 100644 gdb/testsuite/gdb.arch/powerpc-prologue-frame.s diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c index 456dbcc..f0d2781 100644 --- a/gdb/rs6000-tdep.c +++ b/gdb/rs6000-tdep.c @@ -1655,9 +1655,13 @@ skip_prologue (struct gdbarch *gdbarch, CORE_ADDR=20 pc, CORE_ADDR lim_pc, remember just the first one, but skip over additional ones. */ if (lr_reg =3D=3D -1) - lr_reg =3D (op & 0x03e00000) >> 21; - if (lr_reg =3D=3D 0) - r0_contains_arg =3D 0; + { + lr_reg =3D (op & 0x03e00000); + fdata->lr_register =3D lr_reg >> 21; + } + if (lr_reg =3D=3D 0) + r0_contains_arg =3D 0; + continue; } else if ((op & 0xfc1fffff) =3D=3D 0x7c000026) @@ -2180,8 +2184,8 @@ skip_prologue (struct gdbarch *gdbarch, CORE_ADDR=20 pc, CORE_ADDR lim_pc, } #endif /* 0 */ - if (pc =3D=3D lim_pc && lr_reg >=3D 0) - fdata->lr_register =3D lr_reg; + if (pc !=3D lim_pc) + fdata->lr_register =3D -1; fdata->offset =3D -fdata->offset; return last_prologue_pc; diff --git a/gdb/testsuite/gdb.arch/powerpc-prologue-frame.c=20 b/gdb/testsuite/gdb.arch/powerpc-prologue-frame.c new file mode 100644 index 0000000..f59210a --- /dev/null +++ b/gdb/testsuite/gdb.arch/powerpc-prologue-frame.c @@ -0,0 +1,28 @@ +/* This test is part of GDB, the GNU debugger. + + Copyright 2017 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see=20 . */ + +int bar() +{ + return 0; +} + +int foo(); + +int main(void) +{ + return foo(); +} diff --git a/gdb/testsuite/gdb.arch/powerpc-prologue-frame.exp=20 b/gdb/testsuite/gdb.arch/powerpc-prologue-frame.exp new file mode 100644 index 0000000..e90a8c1 --- /dev/null +++ b/gdb/testsuite/gdb.arch/powerpc-prologue-frame.exp @@ -0,0 +1,48 @@ +# Copyright 2017 Free Software Foundation, Inc. + +# This program is free software; you can redistribute it and/or modify +# it under the terms of the GNU General Public License as published by +# the Free Software Foundation; either version 3 of the License, or +# (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program. If not, see + +if {![istarget "powerpc*"] } { + verbose "Skipping powerpc back trace test." + return +} + + +set main_testfile ppc-prolog-frame + +if {![istarget "powerpc*-*-*"]} then { + verbose "Skipping PowerPC instructions disassembly." + return -1 +} + + +if {[gdb_compile \ + [list ${srcdir}/${subdir}/$main_testfile.c=20 ${srcdir}/${subdir}/$main_testfile.S] \ + [standard_output_file ${main_testfile}] \ + executable {debug}] !=3D ""} { + untested "failed to build $main_testfile" + return -1 +} + + +clean_restart ${main_testfile} + +if ![runto bar] { + untested "could not run to bar" + return -1 +} + +gdb_test "bt" \ + "#0 \[x0-9a-f\]* bar \\(\\) at .*#1 \[x0-9a-f in\]* foo \\(\\)=20 at .*#2 \[x0-9a-f in\]* main \\(\\) at .*" \ + "Backtrace to the main frame" diff --git a/gdb/testsuite/gdb.arch/powerpc-prologue-frame.s=20 b/gdb/testsuite/gdb.arch/powerpc-prologue-frame.s new file mode 100644 index 0000000..16cd7e2 --- /dev/null +++ b/gdb/testsuite/gdb.arch/powerpc-prologue-frame.s @@ -0,0 +1,40 @@ +/* This test is part of GDB, the GNU debugger. + + Copyright 2017 Free Software Foundation, Inc. + + This program is free software; you can redistribute it and/or modify + it under the terms of the GNU General Public License as published by + the Free Software Foundation; either version 3 of the License, or + (at your option) any later version. + + This program is distributed in the hope that it will be useful, + but WITHOUT ANY WARRANTY; without even the implied warranty of + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + GNU General Public License for more details. + + You should have received a copy of the GNU General Public License + along with this program. If not, see=20 . */ + + .file "foo.c" + .section ".text" + .align 2 + .globl foo + .type foo, @function +foo: + stwu 1,-32(1) + mflr 3 + stw 3,36(1) + stw 31,28(1) + mr 31,1 + bl bar + mr 9,3 + mr 3,9 + addi 11,31,32 + lwz 0,4(11) + mtlr 0 + lwz 31,-4(11) + mr 1,11 + blr + .size foo,.-foo + .ident "GCC: (Ubuntu 4.8.2-19ubuntu1) 4.8.2" + .section .note.GNU-stack,"",@progbits --=20 On 01.12.2017. 20:36, pedromfc wrote: > Hello Nikola, Kevin, >=20 > Thank you for providing these patches. >=20 > I tested both patches (Nicola's second patch and Kevin's patch) on=20 > ppc64le, and there were no regressions, except for some additional=20 > expected failures in gdb.threads/attach-many-short-lived-threads.exp. >=20 > Some comments: >=20 > - Nikola's patch moves "if(lr_reg =3D=3D 0)/r0_contains_arg =3D 0;" to wi= thin=20 > the first if. This is useful for the case when a second mflr Rx with Rx=20 > !=3D 0 is detected. Previously this would cause r0_contains_arg to be=20 > reset, despite Rx not being 0. However, if the second mflr has Rx =3D=3D = 0,=20 > it would make sense to reset r0_contains_arg (and this would work=20 > accidentally before the patch, assuming the first mflr also had Rx =3D=3D= =20 > 0). Maybe the best solution here is to always check the Rx contained in=20 > the opcode and clear r0_contains_arg if it is 0, regardless of lr_reg,=20 > or leave it as before since it's a separate issue. >=20 > - Kevin's patch assigns lr_reg =3D op & 0x03e00000, but lr_reg is an int,= =20 > and op is an unsigned long. Will the unshifted reg always fit in a int? >=20 > - I think it's more clear to only set lr_register when needed (pc=20 > reaches the limit), as opposed to resetting it to -1 if pc didn't reach=20 > the limit. >=20 > - I wasn't able to directly apply Nikola's patch, I did so manually. >=20 > I've also attached a reproducer (prologue.c/foo.S) to check if the=20 > patches fixed the issue. I had to alter a generated assembly file so=20 > that mflr would use a register other than R0 (in which case the old code= =20 > does work). >=20 > gcc -g0 -O0 -o prologue prologue.c foo.S >=20 > (gdb) file prologue > Reading symbols from prologue...done. > (gdb) break bar > Breakpoint 1 at 0x100005b8 > (gdb) run >=20 > Starting program: /home/pedromfc/prologue >=20 > Before the patch: >=20 > Breakpoint 1, 0x00000000100005b8 in bar () > (gdb) bt > #0=C2=A0 0x00000000100005b8 in bar () > #1=C2=A0 0x0000000010000644 in foo () > Backtrace stopped: frame did not save the PC >=20 > After (both patches): >=20 > Breakpoint 1, 0x00000000100005b8 in bar () > (gdb) bt > #0=C2=A0 0x00000000100005b8 in bar () > #1=C2=A0 0x0000000010000644 in foo () > #2=C2=A0 0x00000000100005f8 in main () >=20 > (gdb) info f 1 > Stack frame at 0x7fffffffeee0: > =C2=A0pc =3D 0x10000644 in foo; saved pc =3D 0x100005f8 >=20 > Thanks! > Pedro >=20 > On 11/09/2017 04:15 PM, Nikola Prica wrote: >> Hi Kevin, >> >> lr_reg could be also set to -2 in part of code which is reachable=20 >> after shifting removal. >> >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 /* Invalidate lr_reg, but don't set it to= -1. >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 That would mean that it= had never been set.=C2=A0 */ >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 lr_reg =3D -2; >> >> This part of the code which depends of non shifted lr_reg, and the=20 >> part where shifting is removed are only two places where lr_reg is=20 >> changed. As so, I've added last condition to set fdata->lr_register on=20 >> -1 if lim_pc is not reached. >> >> If it seems fine now could you pleas commit it because I don't have=20 >> rights to do it. >> >> Thanks, >> >> Nikola Prica >> >> >> From: Prica >> Date: Thu, 9 Nov 2017 13:10:48 +0100 >> Subject: Fix for prologue processing on PowerPC >> >> One of conditions in skip_prologue() is never visited because it >> expects non shifted `lr_reg`.=C2=A0 That condition is supposed to set PC >> offset.=C2=A0 When body of this condition is visited PC offset is set and >> there will be no need to look for it in next frames nor to use frame >> unwind directives. >> >> gdb/ChangeLog: >> >> =C2=A0=C2=A0=C2=A0=C2=A0*rs6000-tdep.c (skip_prologue): Remove shifting = for lr_reg >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 and assign shifted lr_reg to fdata->lr_re= gister when lr_reg is >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 set. If iteration do not hit lim_pc lr_re= gister is set as -1. >> --- >> =C2=A0gdb/rs6000-tdep.c | 13 ++++++++----- >> =C2=A01 file changed, 8 insertions(+), 5 deletions(-) >> >> diff --git a/gdb/rs6000-tdep.c b/gdb/rs6000-tdep.c >> index 6c44995..6f05ef5 100644 >> --- a/gdb/rs6000-tdep.c >> +++ b/gdb/rs6000-tdep.c >> @@ -1655,9 +1655,12 @@ skip_prologue (struct gdbarch *gdbarch,=20 >> CORE_ADDR pc, CORE_ADDR lim_pc, >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 remember just the= first one, but skip over additional >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 ones.=C2=A0 */ >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (lr_reg =3D=3D -1) >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 lr_reg =3D (op & 0x03e00000)= >> 21; >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (lr_reg =3D= =3D 0) >> -=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 r0_c= ontains_arg =3D 0; >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 { >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 lr_reg =3D (op & 0x03e00000); >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 fdata->lr_register =3D lr_re= g >> 21; >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 if (lr_reg =3D=3D 0) >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 r0_contains_arg = =3D 0; >> +=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 } >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 continue; >> =C2=A0=C2=A0=C2=A0=C2=A0 } >> =C2=A0=C2=A0=C2=A0=C2=A0=C2=A0=C2=A0 else if ((op & 0xfc1fffff) =3D=3D 0= x7c000026) >> @@ -2180,8 +2183,8 @@ skip_prologue (struct gdbarch *gdbarch,=20 >> CORE_ADDR pc, CORE_ADDR lim_pc, >> =C2=A0=C2=A0=C2=A0=C2=A0 } >> =C2=A0#endif /* 0 */ >> >> -=C2=A0 if (pc =3D=3D lim_pc && lr_reg >=3D 0) >> -=C2=A0=C2=A0=C2=A0 fdata->lr_register =3D lr_reg; >> +=C2=A0 if (pc !=3D lim_pc) >> +=C2=A0=C2=A0=C2=A0 fdata->lr_register =3D -1; >> >> =C2=A0=C2=A0 fdata->offset =3D -fdata->offset; >> =C2=A0=C2=A0 return last_prologue_pc; >=20