From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: (qmail 69801 invoked by alias); 25 Jan 2017 16:24:21 -0000 Mailing-List: contact gdb-patches-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: gdb-patches-owner@sourceware.org Received: (qmail 69569 invoked by uid 89); 25 Jan 2017 16:24:04 -0000 Authentication-Results: sourceware.org; auth=none X-Virus-Found: No X-Spam-SWARE-Status: No, score=-5.1 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD,SPF_HELO_PASS autolearn=ham version=3.3.2 spammy=H*f:sk:9cab8cd, H*MI:sk:9cab8cd, H*i:sk:9cab8cd X-HELO: mx1.redhat.com Received: from mx1.redhat.com (HELO mx1.redhat.com) (209.132.183.28) by sourceware.org (qpsmtpd/0.93/v0.84-503-g423c35a) with ESMTP; Wed, 25 Jan 2017 16:23:54 +0000 Received: from smtp.corp.redhat.com (int-mx16.intmail.prod.int.phx2.redhat.com [10.5.11.28]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 39940769FA; Wed, 25 Jan 2017 16:23:54 +0000 (UTC) Received: from [127.0.0.1] (ovpn04.gateway.prod.ext.phx2.redhat.com [10.5.9.4]) by smtp.corp.redhat.com (Postfix) with ESMTP id 65B351CD1B2; Wed, 25 Jan 2017 16:23:53 +0000 (UTC) Subject: Re: [PATCH] Bug 20936 - provide sparc and sparcv9 target description XML files To: Ivo Raisr References: <46200a1e-29f7-8e20-c0b5-3f6f25c82d45@oracle.com> <20161206152616.GC28789@E107787-LIN> <83d4c58d-0834-4fc2-6194-72408510aa8a@oracle.com> <20161212125331.GB25542@E107787-LIN> <082f9ac8-3e46-42cd-198d-91866d83ebb8@oracle.com> <20170105143109.GA21293@E107787-LIN> <9351d864-e939-cc66-97e3-1c768bf78df1@redhat.com> <9cab8cda-99e8-8921-c999-be0324a133f8@oracle.com> Cc: Yao Qi , gdb-patches@sourceware.org From: Pedro Alves Message-ID: Date: Wed, 25 Jan 2017 16:24:00 -0000 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.4.0 MIME-Version: 1.0 In-Reply-To: <9cab8cda-99e8-8921-c999-be0324a133f8@oracle.com> Content-Type: text/plain; charset=windows-1252 Content-Transfer-Encoding: 7bit X-SW-Source: 2017-01/txt/msg00538.txt.bz2 On 01/25/2017 04:05 PM, Ivo Raisr wrote: > > > On 25.1.2017 16:46, Pedro Alves wrote: >> (I know I'm quite behind this thread.) >> >> On 01/06/2017 03:12 PM, Ivo Raisr wrote: >>> >>> ChangeLog entry: >>> 2017-01-06 Ivo Raisr >>> >>> Split real and pseudo registers in preparation for registers >>> provided >>> by a target. Registers provided by target description can have >>> more real >>> registers and pseudo registers need to be positioned after them. >> >> I don't quite understand this rationale, and I'm wondering if there's >> a misunderstanding of register numbering somewhere (maybe mine!). >> >> What exactly would go wrong if you just added the new registers >> between the existing raw and pseudo registers? Other ports do >> that routinely. > > Good question. > The rationale is target provided registers. > Consider a typical Valgrind use case where target (gdbserver stub > implemented inside Valgrind) supplies 3 times more raw registers than > the architecture normally supports. > One set mimics the "normal" registers, the other two sets are shadow > copies used internally by Memcheck tool to keep track of > defined/undefined bits and their origins. > > So when gdb'ing ordinary process, you have: > - raw registers (one set) > - pseudo registers > > However when gdb'ing Valgrind'ed process over gdb remote protocol > with --vgdb-shadow-registers=yes, target provides: > - first set of raw registers (describes guest state) > - second set of raw registers (describes the first shadow copy) > - third set of raw registers (describes the second shadow copy) > - pseudo registers (actually provided by gdb) > > So this means pseudo registers numbering must be flexible. > Other targets (such as s390x, aarch64, amd64) do it in similar ways. Ah, OK. I see what you're doing now. Thanks for clarifying! Thanks, Pedro Alves